Publications

Duan, S., Z. Dong, X. Hu, L. Wang, and H. Li. “Small-world Hopfield neural networks with weight salience priority and memristor synapses for digit recognition.” Neural Computing and Applications 27, no. 4 (May 1, 2016): 837–44. https://doi.org/10.1007/s00521-015-1899-7.

Liu, X., M. Mao, B. Liu, B. Li, Y. Wang, H. Jiang, M. Barnell, et al. “Harmonica: A Framework of Heterogeneous Computing Systems with Memristor-Based Neuromorphic Computing Accelerators.” IEEE Transactions on Circuits and Systems I Regular Papers 63, no. 5 (May 1, 2016): 617–28. https://doi.org/10.1109/TCSI.2016.2529279.

Mao, F., Y. C. Chen, W. Zhang, H. Li, and B. He. “Library-based placement and routing in FPGAs with support of partial reconfiguration.” ACM Transactions on Design Automation of Electronic Systems 21, no. 4 (May 1, 2016). https://doi.org/10.1145/2901295.

Wen, W., M. Mao, H. Li, Y. Chen, Y. Pei, and N. Ge. “A holistic tri-region MLC STT-RAM design with combined performance, energy, and reliability optimizations.” In Proceedings of the 2016 Design Automation and Test in Europe Conference and Exhibition Date 2016, 1285–90, 2016. https://doi.org/10.3850/9783981537079_0917.

Wang, X., M. Mao, E. Eken, W. Wen, H. Li, and Y. Chen. “Sliding Basket: An adaptive ECC scheme for runtime write failure suppression of STT-RAM cache.” In Proceedings of the 2016 Design Automation and Test in Europe Conference and Exhibition Date 2016, 762–67, 2016. https://doi.org/10.3850/9783981537079_0419.

Liu, B., X. Liu, C. Liu, W. Wen, M. Meng, H. Li, and Y. Chen. “Hardware acceleration for neuromorphic computing: An evolving view.” In 2015 15th Non Volatile Memory Technology Symposium Nvmts 2015, 2016. https://doi.org/10.1109/NVMTS.2015.7457496.

Sun, Z., X. Bi, W. Wu, S. Yoo, and H. H. Li. “Array Organization and Data Management Exploration in Racetrack Memory.” IEEE Transactions on Computers 65, no. 4 (April 1, 2016): 1041–54. https://doi.org/10.1109/TC.2014.2360545.

Nixon, K. W., X. Chen, Z. H. Mao, and Y. Chen. “SlowMo-enhancing mobile gesture-based authentication schemes via sampling rate optimization.” In Proceedings of the Asia and South Pacific Design Automation Conference ASP DAC, 25-28-January-2016:462–67, 2016. https://doi.org/10.1109/ASPDAC.2016.7428055.

Nixon, K. W., X. Chen, and Y. Chen. “Footfall-GPS polling scheduler for power saving on wearable devices.” In Proceedings of the Asia and South Pacific Design Automation Conference ASP DAC, 25-28-January-2016:563–68, 2016. https://doi.org/10.1109/ASPDAC.2016.7428071.

Zhang, X., S. Guangyu, Y. Zhang, Y. Chen, H. Li, W. Wen, and J. Di. “A novel PUF based on cell error rate distribution of STT-RAM.” In Proceedings of the Asia and South Pacific Design Automation Conference ASP DAC, 25-28-January-2016:342–47, 2016. https://doi.org/10.1109/ASPDAC.2016.7428035.

Wu, C. R., W. Wen, T. Y. Ho, and Y. Chen. “Thermal optimization for memristor-based hybrid neuromorphic computing systems.” In Proceedings of the Asia and South Pacific Design Automation Conference ASP DAC, 25-28-January-2016:274–79, 2016. https://doi.org/10.1109/ASPDAC.2016.7428023.

Yang, J., P. Wang, Y. Zhang, Y. Cheng, W. Zhao, Y. Chen, and H. H. Li. “Radiation-induced soft error analysis of STT-MRAM: A device to circuit approach.” IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems 35, no. 3 (March 1, 2016): 380–93. https://doi.org/10.1109/TCAD.2015.2474366.

Li, H., X. Bi, and Z. Sun. “The evolutionary spintronic technologies and their usage in high performance computing.” In International System on Chip Conference, 2016-February:350–55, 2016. https://doi.org/10.1109/SOCC.2015.7406981.

Chen, X., J. Mao, K. W. Nixon, and Y. Chen. “MORPh: Mobile OLED power friendly camera system.” In Proceedings of the 2016 27th International Symposium on Rapid System Prototyping Shortening the Path from Specification to Prototype Rsp 2016, 7–11, 2016. https://doi.org/10.1145/2990299.2990302.

Li, H. H., M. Hu, and B. Liu. “Memristor modeling - static, statistical, and stochastic methodologies.” In Nano Cmos and Post Cmos Electronics Devices and Modelling, 313–35, 2016. https://doi.org/10.1049/PBCS029E_ch11.

Chen, L., C. Li, T. Huang, X. Hu, and Y. Chen. “The bipolar and unipolar reversible behavior on the forgetting memristor model.” Neurocomputing 171 (January 1, 2016): 1637–43. https://doi.org/10.1016/j.neucom.2015.06.067.

Wen, W., C. Wu, Y. Wang, Y. Chen, and H. Li. “Learning structured sparsity in deep neural networks.” In Advances in Neural Information Processing Systems, 2082–90, 2016.

Chen, Y., H. Li, Y. Xie, and D. Niu. “Components, Platforms, and Architectures: Low-Power Design of Emerging Memory Technologies.” In Handbook of Energy Aware and Green Computing Two Volume Set, 1:67–90, 2016.

Cline, Brian, Saibal Mukhopadhyay, Peter J. Wright, Hai Li, Vinod Viswanath, Paul Wesling, Gang Qu, and Ali Iranmanesh. “Welcome.” In ISQED. IEEE, 2016.

Li, Hong-qi, Qing-wei Liu, Jue-shu Fang, and Yu-long Wang. “Synthesis and Characterization of 3-butyryloxy-16-(β-naphthylmethylene)-5α-androstane-17-one.” In PROCEEDINGS OF THE 2016 INTERNATIONAL CONFERENCE ON BIOMEDICAL AND BIOLOGICAL ENGINEERING, 97–101, 2016.

Guo, Jing, Chao Liu, and Philippe Poignet. “Effect of Non-passive Operator on Enhanced Wave-Based Teleoperator for Robotic-Assisted Surgery: First Case Study,” 1–14. Springer International Publishing, 2016. https://doi.org/10.1007/978-3-319-30674-2_1.

Zhang, X., G. Sun, C. Zhang, W. Zhang, Y. Liang, T. Wang, Y. Chen, and J. Di. “Fork path: Improving efficiency of ORAM by removing redundant memory accesses.” In Proceedings of the Annual International Symposium on Microarchitecture Micro, 05-09-December-2015:102–14, 2015. https://doi.org/10.1145/2830772.2830787.

Li, B., P. Gu, Y. Shan, Y. Wang, Y. Chen, and H. Yang. “RRAM-Based Analog Approximate Computing.” IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems 34, no. 12 (December 1, 2015): 1905–17. https://doi.org/10.1109/TCAD.2015.2445741.

Liang, H., Y. C. Chen, T. Luo, W. Zhang, H. Li, and B. He. “Hierarchical Library Based Power Estimator for Versatile FPGAs.” In Proceedings IEEE 9th International Symposium on Embedded Multicore Manycore Socs Mcsoc 2015, 25–32, 2015. https://doi.org/10.1109/MCSoC.2015.44.

Li, Z., C. Liu, Y. Wang, B. Yan, C. Yang, J. Yang, and H. Li. “An overview on memristor crossabr based neuromorphic circuit and architecture.” In IEEE IFIP International Conference on VLSI and System on Chip VLSI Soc, 2015-October:52–56, 2015. https://doi.org/10.1109/VLSI-SoC.2015.7314391.