Publications

Chen, W. H., and Y. Chen. “An ensemble approach to activity recognition based on binary sensor readings.” In 2017 IEEE 19th International Conference on E Health Networking Applications and Services Healthcom 2017, 2017-December:1–5, 2017. https://doi.org/10.1109/HealthCom.2017.8210816.

Qin, Z., Z. Xu, Q. Dong, Y. Chen, and X. Chen. “VoCaM: Visualization oriented convolutional neural network acceleration on mobile system: Invited paper.” In IEEE ACM International Conference on Computer Aided Design Digest of Technical Papers Iccad, 2017-November:835–40, 2017. https://doi.org/10.1109/ICCAD.2017.8203864.

Mao, J., Z. Qin, Z. Xu, K. W. Nixon, X. Chen, H. Li, and Y. Chen. “AdaLearner: An adaptive distributed mobile learning system for neural networks.” In IEEE ACM International Conference on Computer Aided Design Digest of Technical Papers Iccad, 2017-November:291–96, 2017. https://doi.org/10.1109/ICCAD.2017.8203791.

Yan, B., J. Yang, Q. Wu, Y. Chen, and H. Li. “A closed-loop design to enhance weight stability of memristor based neural network chips.” In IEEE ACM International Conference on Computer Aided Design Digest of Technical Papers Iccad, 2017-November:541–48, 2017. https://doi.org/10.1109/ICCAD.2017.8203824.

Mao, J., Z. Yang, W. Wen, C. Wu, L. Song, K. W. Nixon, X. Chen, H. Li, and Y. Chen. “MeDNN: A distributed mobile system with enhanced partition and deployment for large-scale DNNs.” In IEEE ACM International Conference on Computer Aided Design Digest of Technical Papers Iccad, 2017-November:751–56, 2017. https://doi.org/10.1109/ICCAD.2017.8203852.

Wu, C., W. Wen, T. Afzal, Y. Zhang, Y. Chen, and H. H. Li. “A compact DNN: Approaching GoogLeNet-level accuracy of classification and domain adaptation.” In Proceedings 30th IEEE Conference on Computer Vision and Pattern Recognition Cvpr 2017, 2017-January:761–70, 2017. https://doi.org/10.1109/CVPR.2017.88.

Guo, J., C. Min, T. Cai, and Y. Chen. “Improving write performance and extending endurance of object-based NAND flash devices.” ACM Transactions on Embedded Computing Systems 17, no. 1 (November 1, 2017). https://doi.org/10.1145/3105924.

Song, C., B. Liu, W. Wen, H. Li, and Y. Chen. “A quantization-aware regularized learning method in multilevel memristor-based neuromorphic computing system.” In Nvmsa 2017 6th IEEE Non Volatile Memory Systems and Applications Symposium, 2017. https://doi.org/10.1109/NVMSA.2017.8064465.

Liu, C., F. Liu, and H. Li. “Brain-inspired computing accelerated by memristor technology.” In Proceedings of the 4th ACM International Conference on Nanoscale Computing and Communication Nanocom 2017, 2017. https://doi.org/10.1145/3109453.3123960.

Mao, M., W. Wen, Y. Zhang, Y. Chen, and H. Li. “An Energy-Efficient GPGPU Register File Architecture Using Racetrack Memory.” IEEE Transactions on Computers 66, no. 9 (September 1, 2017): 1478–90. https://doi.org/10.1109/TC.2017.2690855.

Hu, M., Y. Chen, J. J. Yang, Y. Wang, and H. Li. “A Compact Memristor-Based Dynamic Synapse for Spiking Neural Networks.” IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems 36, no. 8 (August 1, 2017): 1353–66. https://doi.org/10.1109/TCAD.2016.2618866.

Guo, J., W. Wen, J. Hu, D. Wang, H. Li, and Y. Chen. “FlexLevel NAND Flash Storage System Design to Reduce LDPC Latency.” IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems 36, no. 7 (July 1, 2017): 1167–80. https://doi.org/10.1109/TCAD.2016.2619480.

Zhang, Y., B. Yan, X. Wang, and Y. Chen. “Persistent and Nonpersistent Error Optimization for STT-RAM Cell Design.” IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems 36, no. 7 (July 1, 2017): 1181–92. https://doi.org/10.1109/TCAD.2016.2619484.

Li, S., W. Wen, Y. Wang, S. Han, Y. Chen, and H. H. Li. “An FPGA design framework for CNN sparsification and acceleration.” In Proceedings IEEE 25th Annual International Symposium on Field Programmable Custom Computing Machines Fccm 2017, 28, 2017. https://doi.org/10.1109/FCCM.2017.21.

Niu, D., R. Xue, T. Cai, H. Li, K. Effah, and H. Zhang. “The new large-scale RNNLM system based on distributed neuron.” In Proceedings 2017 IEEE 31st International Parallel and Distributed Processing Symposium Workshops Ipdpsw 2017, 433–36, 2017. https://doi.org/10.1109/IPDPSW.2017.21.

Hassan, A. M., H. H. Li, and Y. Chen. “Hardware implementation of echo state networks using memristor double crossbar arrays.” In Proceedings of the International Joint Conference on Neural Networks, 2017-May:2171–77, 2017. https://doi.org/10.1109/IJCNN.2017.7966118.

Pan, C., M. Xie, Y. Liu, Y. Wang, C. J. Xue, Y. Chen, and J. Hu. “A lightweight progress maximization scheduler for non-volatile processor under unstable energy harvesting.” In ACM SIGPLAN Notices, 52:101–10, 2017. https://doi.org/10.1145/3078633.3081038.

Liu, C., M. Hu, J. P. Strachan, and H. H. Li. “Rescuing Memristor-based Neuromorphic Design with High Defects.” In Proceedings Design Automation Conference, Vol. Part 128280, 2017. https://doi.org/10.1145/3061639.3062310.

Wang, Y., W. Wen, B. Liu, D. Chiarulli, and H. H. Li. “Group Scissor: Scaling Neuromorphic Computing Design to Large Neural Networks.” In Proceedings Design Automation Conference, Vol. Part 128280, 2017. https://doi.org/10.1145/3061639.3062256.

Chen, Y., H. H. Li, I. Bayram, and E. Eken. “Recent Technology Advances of Emerging Memories.” IEEE Design and Test 34, no. 3 (June 1, 2017): 8–22. https://doi.org/10.1109/MDAT.2017.2685381.

Bi, X., M. Mao, D. Wang, and H. Li. “Cross-layer optimization for multilevel cell STT-RAM caches.” IEEE Transactions on Very Large Scale Integration VLSI Systems 25, no. 6 (June 1, 2017): 1807–20. https://doi.org/10.1109/TVLSI.2017.2665543.

Chen, Y., T. W. Kuo, and B. De Salvo. “Guest Editors' Introduction: Critical and Enabling Techniques for Emerging Memories.” IEEE Design and Test 34, no. 3 (June 1, 2017): 6–7. https://doi.org/10.1109/MDAT.2017.2682253.

Eken, E., I. Bayram, Y. Zhang, B. Yan, H. Li, and Y. Chen. “Giant Spin-Hall assisted STT-RAM and logic design.” Integration the VLSI Journal 58 (June 1, 2017): 253–61. https://doi.org/10.1016/j.vlsi.2017.04.002.

Li, Z., C. Liu, H. Li, and Y. Chen. “Neuromorphic Hardware Acceleration Enabled by Emerging Technologies.” In Emerging Technology and Architecture for Big-Data Analytics. Springer, 2017.

Mao, J., X. Chen, K. W. Nixon, C. Krieger, and Y. Chen. “MoDNN: Local distributed mobile computing system for Deep Neural Network.” In Proceedings of the 2017 Design Automation and Test in Europe Date 2017, 1396–1401, 2017. https://doi.org/10.23919/DATE.2017.7927211.