Publications
2018
Yan, B., F. Chen, Y. Zhang, C. Song, H. Li, and Y. Chen. “Exploring the opportunity of implementing neuromorphic computing systems with spintronic devices.” In Proceedings of the 2018 Design Automation and Test in Europe Conference and Exhibition Date 2018, 2018-January:109–12, 2018. https://doi.org/10.23919/DATE.2018.8341988.
Gauen, K., R. Dailey, Y. H. Lu, E. Park, W. Liu, A. C. Berg, and Y. Chen. “Three years of low-power image recognition challenge: Introduction to special session.” In Proceedings of the 2018 Design Automation and Test in Europe Conference and Exhibition Date 2018, 2018-January:700–703, 2018. https://doi.org/10.23919/DATE.2018.8342099.
Ji, H., L. Song, L. Jiang, H. H. Li, and Y. Chen. “Recom: An efficient resistive accelerator for compressed deep neural networks.” In Proceedings of the 2018 Design Automation and Test in Europe Conference and Exhibition Date 2018, 2018-January:237–40, 2018. https://doi.org/10.23919/DATE.2018.8342009.
Li, B., L. Song, F. Chen, X. Qian, Y. Chen, and H. Li. “ReRAM-based accelerator for deep learning.” In Proceedings of the 2018 Design Automation and Test in Europe Conference and Exhibition Date 2018, 2018-January:815–20, 2018. https://doi.org/10.23919/DATE.2018.8342118.
Zhang, L., W. Song, J. J. Yang, H. Li, and Y. Chen. “A compact model for selectors based on metal doped electrolyte.” Applied Physics A Materials Science and Processing 124, no. 4 (April 1, 2018). https://doi.org/10.1007/s00339-018-1706-2.
Song, L., Y. Zhuo, X. Qian, H. Li, and Y. Chen. “GraphR: Accelerating Graph Processing Using ReRAM.” In Proceedings International Symposium on High Performance Computer Architecture, 2018-February:531–43, 2018. https://doi.org/10.1109/HPCA.2018.00052.
Wang, P., S. Li, G. Sun, X. Wang, Y. Chen, H. Li, J. Cong, N. Xiao, and T. Zhang. “RC-NVM: Enabling Symmetric Row and Column Memory Accesses for In-memory Databases.” In Proceedings International Symposium on High Performance Computer Architecture, 2018-February:518–30, 2018. https://doi.org/10.1109/HPCA.2018.00051.
Chen, Y., H. Li, C. Wu, C. Song, S. Li, C. Min, H. P. Cheng, W. Wen, and X. Liu. “Neuromorphic computing's yesterday, today, and tomorrow – an evolutional view.” Integration 61 (March 1, 2018): 49–61. https://doi.org/10.1016/j.vlsi.2017.11.001.
Basu, A., J. Acharya, T. Karnik, H. Liu, H. Li, J. S. Seo, and C. Song. “Low-Power, Adaptive Neuromorphic Systems: Recent Progress and Future Directions.” IEEE Journal on Emerging and Selected Topics in Circuits and Systems 8, no. 1 (March 1, 2018): 6–27. https://doi.org/10.1109/JETCAS.2018.2816339.
Li, B., W. Wen, J. Mao, S. Li, Y. Chen, and H. H. Li. “Running sparse and low-precision neural network: When algorithm meets hardware.” In Proceedings of the Asia and South Pacific Design Automation Conference ASP DAC, 2018-January:534–39, 2018. https://doi.org/10.1109/ASPDAC.2018.8297378.
Chen, F., L. Song, and Y. Chen. “ReGAN: A pipelined ReRAM-based accelerator for generative adversarial networks.” In Proceedings of the Asia and South Pacific Design Automation Conference ASP DAC, 2018-January:178–83, 2018. https://doi.org/10.1109/ASPDAC.2018.8297302.
Eken, E., I. Bayram, H. H. Li, and Y. Chen. “Modeling of biaxial magnetic tunneling junction for multi-level cell STT-RAM realization.” In Proceedings of the Asia and South Pacific Design Automation Conference ASP DAC, 2018-January:375–80, 2018. https://doi.org/10.1109/ASPDAC.2018.8297352.
Liu, X., W. Wen, X. Qian, H. Li, and Y. Chen. “Neu-NoC: A high-efficient interconnection network for accelerated neuromorphic systems.” In Proceedings of the Asia and South Pacific Design Automation Conference ASP DAC, 2018-January:141–46, 2018. https://doi.org/10.1109/ASPDAC.2018.8297296.
Jia, X., J. Yang, Z. Wang, Y. Chen, H. H. Li, and W. Zhao. “Spintronics based stochastic computing for efficient Bayesian inference system.” In Proceedings of the Asia and South Pacific Design Automation Conference ASP DAC, 2018-January:580–85, 2018. https://doi.org/10.1109/ASPDAC.2018.8297385.
Chen, F., Z. Li, W. Kang, W. Zhao, H. Li, and Y. Chen. “Process variation aware data management for magnetic skyrmions racetrack memory.” In Proceedings of the Asia and South Pacific Design Automation Conference ASP DAC, 2018-January:221–26, 2018. https://doi.org/10.1109/ASPDAC.2018.8297309.
Yan, B., C. Liu, X. Liu, Y. Chen, and H. Li. “Understanding the trade-offs of device, circuit and application in ReRAM-based neuromorphic computing systems.” In Technical Digest International Electron Devices Meeting Iedm, 11.4.1-11.4.4, 2018. https://doi.org/10.1109/IEDM.2017.8268371.
Mohanty, S. P., M. Hüebner, C. J. Xue, X. Li, and H. Li. “Guest editorial circuit and system design automation for internet of things.” IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems 37, no. 1 (January 1, 2018): 3–6. https://doi.org/10.1109/TCAD.2017.2779960.
Dong, C., Y. Chen, and B. Zeng. “Generalized inverse optimization through online learning.” In Advances in Neural Information Processing Systems, 2018-December:86–95, 2018.
Liu, C., F. Liu, and H. Li. “Beyond CMOS: Memristor and its application for next generation storage and computing.” In Ecs Transactions, 85:115–25, 2018. https://doi.org/10.1149/08506.0115ecst.
Wen, W., Y. Chen, H. Li, Y. He, S. Rajbhandari, M. Zhang, W. Wang, F. Liu, and B. Hu. “Learning intrinsic sparse structures within long short-term memory.” In 6th International Conference on Learning Representations, ICLR 2018 - Conference Track Proceedings, 2018.
Wen, W., Y. Chen, H. Li, Y. He, S. Rajbhandari, M. Zhang, W. Wang, F. Liu, and B. Hu. “Learning intrinsic sparse structures within long short-term memory.” In 6th International Conference on Learning Representations Iclr 2018 Conference Track Proceedings, 2018.
2017
Wen, W., C. Xu, C. Wu, Y. Wang, Y. Chen, and H. Li. “Coordinating Filters for Faster Deep Neural Networks.” In Proceedings of the IEEE International Conference on Computer Vision, 2017-October:658–66, 2017. https://doi.org/10.1109/ICCV.2017.78.
Broyde, L., K. Nixon, X. Chen, H. Li, and Y. Chen. “MobiCore: An adaptive hybrid approach for power-efficient CPU management on Android devices.” In International System on Chip Conference, 2017-September:221–26, 2017. https://doi.org/10.1109/SOCC.2017.8226044.