Publications

Found 546 results
Type [ Year(Asc)]
2020
J Zhu, G Sun, X Zhang, C Zhang, W Zhang, Y Liang, T Wang, Y Chen, and J Di. "Fork Path: Batching ORAM Requests to Remove Redundant Memory Accesses." Ieee Transactions on Computer Aided Design of Integrated Circuits and Systems 39, no. 10 (2020): 2279-2292.
N Challapalle, S Rampalli, L Song, N Chandramoorthy, K Swaminathan, J Sampson, Y Chen, and V Narayanan. "GaaS-X: Graph Analytics Accelerator Supporting Sparse Data Representation using Crossbar Architectures." In Proceedings International Symposium on Computer Architecture, 433-445. Vol. 2020-May. 2020.
BK Joardar, Kannappan N Jayakodi,, H Li, PP Pande, and K Chakrabarty. "GRAMARCH: A GPU-ReRAM based Heterogeneous Architecture for Neural Image Segmentation." In Proceedings of the 2020 Design, Automation and Test in Europe Conference and Exhibition, Date 2020, 228-233. 2020.
X Chai, H Wu, Z Gan, Y Zhang, and Y Chen. "Hiding cipher-images generated by 2-D compressive sensing with a multi-embedding strategy." Signal Processing 171 (2020).
B Taylor, Z Li, B Yan, H Li, and Y Chen. "Highly efficient neuromorphic computing systems with emerging nonvolatile memories." In Smart Structures and Materials 2005: Active Materials: Behavior and Mechanics. Vol. 11324. 2020.
B Li, Y Wang, and Y Chen. "HitM: High-Throughput ReRAM-based PIM for Multi-Modal Neural Networks." In Ieee/Acm International Conference on Computer Aided Design, Digest of Technical Papers, Iccad. Vol. 2020-November. 2020.
Q Guo, J Ye, Y Chen, Y Hu, Y Lan, G Zhang, and X Li. "INOR—An Intelligent noise reduction method to defend against adversarial audio examples." Neurocomputing 401 (2020): 160-172.
T Serrano-Gotarredona, M Valle, F Conti, and H Li. "Introduction to the Special Issue on the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS 2020)." Ieee Journal on Emerging and Selected Topics in Circuits and Systems 10, no. 4 (2020): 403-405.
Q Zheng, Z Wang, Z Feng, B Yan, Y Cai, R Huang, Y Chen, CL Yang, and HH Li. "Lattice: An ADC/DAC-less ReRAM-based processing-in-memory architecture for accelerating deep convolution neural networks." In Proceedings Design Automation Conference. Vol. 2020-July. 2020.
H Yang, M Tang, W Wen, F Yan, D Hu, A Li, H Li, and Y Chen. "Learning low-rank deep neural networks via singular vector orthogonality regularization and singular value sparsification." In Ieee Computer Society Conference on Computer Vision and Pattern Recognition Workshops, 2899-2908. Vol. 2020-June. 2020.
B Kim, and H Li. "Leveraging 3D vertical RRAM to developing neuromorphic architecture for pattern classification." In Proceedings of Ieee Computer Society Annual Symposium on Vlsi, Isvlsi, 258-263. Vol. 2020-July. 2020.
S Zhang, GL Zhang, B Li, HH Li, and U Schlichtmann. "Lifetime Enhancement for RRAM-based Computing-In-Memory Engine Considering Aging and Thermal Effects." In Proceedings 2020 Ieee International Conference on Artificial Intelligence Circuits and Systems, Aicas 2020, 11-15. 2020.
G Zhang, B Li, J Wu, R Wang, Y Lan, L Sun, S Lei, H Li, and Y Chen. "A low-cost and high-speed hardware implementation of spiking neural network." Neurocomputing 382 (2020): 106-115.
D Feng, J Xu, Y Hua, W Tong, J Liu, C Li, and Y Chen. "A Low-Overhead Encoding Scheme to Extend the Lifetime of Nonvolatile Memories." Ieee Transactions on Computer Aided Design of Integrated Circuits and Systems 39, no. 10 (2020): 2516-2529.
S Wen, H Wei, Z Yan, Z Guo, Y Yang, T Huang, and Y Chen. "Memristor-Based Design of Sparse Compact Convolutional Neural Network." Ieee Transactions on Network Science and Engineering 7, no. 3 (2020): 1431-1440.
TY Ho, S Tan, and Y Chen. "Message from the Technical Program Committee." In Proceedings of the Asia and South Pacific Design Automation Conference, Asp Dac. Vol. 2020-January. 2020.
Q Zheng, X Li, Z Wang, G Sun, Y Cai, R Huang, Y Chen, and H Li. "MobiLattice: A Depth-wise DCNN Accelerator with Hybrid Digital/Analog Nonvolatile Processing-In-Memory Block." In Ieee/Acm International Conference on Computer Aided Design, Digest of Technical Papers, Iccad. Vol. 2020-November. 2020.
A Li, C Wu, Y Chen, and B Ni. "MVStylizer: An efficient edge-assisted video photorealistic style transfer system for mobile phones." In Proceedings of the International Symposium on Mobile Ad Hoc Networking and Computing (Mobihoc), 31-40. 2020.
W Wen, H Liu, Y Chen, H Li, G Bender, and PJ Kindermans. "Neural Predictor for Neural Architecture Search." In Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), 660-676. Vol. 12374 LNCS. 2020.
B Yan, Z Li, B Taylor, H Li, and Y Chen. "Neuromorphic Computing Systems with Emerging Nonvolatile Memories: A Circuits and Systems Perspective." In 2020 International Symposium on Vlsi Technology, Systems and Applications, Vlsi Tsa 2020, 122-123. 2020.
L Song, F Chen, Y Chen, and HH Li. "Parallelism in Deep Learning Accelerators." In Proceedings of the Asia and South Pacific Design Automation Conference, Asp Dac, 645-650. Vol. 2020-January. 2020.
F Chen, L Song, HH Li, and Y Chen. "PARC: A Processing-in-CAM Architecture for Genomic Long Read Pairwise Alignment using ReRAM." In Proceedings of the Asia and South Pacific Design Automation Conference, Asp Dac, 175-180. Vol. 2020-January. 2020.
S Li, E Hanson, H Li, and Y Chen. "PENNI: Pruned kernel sharing for efficient cnn inference." In 37th International Conference on Machine Learning, Icml 2020, 5819-5829. Vol. PartF168147-8. 2020.
N Inkawhich, KJ Liang, B Wang, M Inkawhich, L Carin, and Y Chen. "Perturbing across the feature hierarchy to improve standard and strict blackbox attack transferability." In Advances in Neural Information Processing Systems. Vol. 2020-December. 2020.
S Wang, Y CAO, S Wen, Z Guo, T Huang, and Y Chen. "Projective Synchroniztion of Neural Networks via Continuous/Periodic Event-Based Sampling Algorithms." Ieee Transactions on Network Science and Engineering 7, no. 4 (2020): 2746-2754.

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