Publications

Chang, C. C., C. T. Ho, Y. Li, Y. Chen, and H. Ren. “DRC-Coder: Automated DRC Checker Code Generation Using LLM Autonomous Agent.” In Proceedings of the International Symposium on Physical Design, 143–51, 2025. https://doi.org/10.1145/3698364.3705347.

Chang, C. C., W. H. Lin, J. Pan, G. Zhou, Z. Xie, J. Hu, and Y. Chen. “PRICING: Privacy-Preserving Circuit Data Sharing Framework for Lithographic Hotspot Detection.” In Proceedings of the Asia and South Pacific Design Automation Conference ASP DAC, 1308–13, 2025. https://doi.org/10.1145/3658617.3697773.

Pan, J., G. Zhou, C. C. Chang, I. Jacobson, J. Hu, and Y. Chen. “A Survey of Research in Large Language Models for Electronic Design Automation.” ACM Transactions on Design Automation of Electronic Systems 30, no. 3 (February 24, 2025). https://doi.org/10.1145/3715324.

Horton, M., H. Shan, J. Kiessling, H. Yang, Y. Chen, and H. H. Li. “Designing and Training Neural Networks for Analog In-Sensor Deployment: A Hardware-Aware Analysis.” In IEEE ACM International Conference on Computer Aided Design Digest of Technical Papers Iccad, 2025. https://doi.org/10.1109/ICCAD66269.2025.11240921.

Molom-Ochir, T., N. Saxena, J. Kim, Y. Chen, Z. Wang, M. Pajic, and H. Helen. “Efficient Neuro-Symbolic Policy using In-Memory Computing.” In Proceedings of Machine Learning Research, Vol. 288, 2025.

Wei, C., C. Guo, F. Cheng, S. Li, H. F. Yang, H. H. Li, and Y. Chen. “Prosperity: Accelerating Spiking Neural Networks via Product Sparsity.” In Proceedings International Symposium on High Performance Computer Architecture, 806–20, 2025. https://doi.org/10.1109/HPCA61900.2025.00066.

Yang, X., P. Chen, T. Molom-Ochir, and Y. Chen. “End-to-End Transformer Acceleration Through Processing-in-Memory Architectures.” In Proceedings of the International Conference on Microelectronics Icm, 2025. https://doi.org/10.1109/ICM66518.2025.11322529.

Molom-Ochir, T., B. Taylor, H. Li, and Y. Chen. “Advancements in Content-Addressable Memory (CAM) Circuits: State-of-the-Art, Applications, and Future Directions in the AI Domain.” IEEE Transactions on Circuits and Systems I Regular Papers 72, no. 8 (January 1, 2025): 3971–82. https://doi.org/10.1109/TCSI.2025.3527309.

Chang, C. C., W. H. Lin, Y. Shen, Y. Chen, and X. Zhang. “LaMAGIC2: Advanced Circuit Formulations for Language Model-Based Analog Topology Generation.” In Proceedings of Machine Learning Research, 267:7351–60, 2025.

Zhou, G., B. Korrapati, G. R. Reddy, J. Zhang, Y. Chen, and D. G. Thakurta. “Vario: Enhance Pattern Diversity with Diffusion Model.” In Proceedings of SPIE the International Society for Optical Engineering, Vol. 13425, 2025. https://doi.org/10.1117/12.3049792.

Kim, B., P. Mehta, and Y. Chen. “Dataflow-Driven Neuromorphic Architectures for Edge AI: Theory, Design, and Applications.” In Proceedings of the International Conference on Microelectronics Icm, 2025. https://doi.org/10.1109/ICM66518.2025.11321320.

Yu, F., Z. Xu, L. Shangguan, D. Wang, D. Stamoulis, R. Madhok, N. Karianakis, et al. “Rethinking Latency-Aware DNN Design With GPU Tail Effect Analysis.” IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems 44, no. 1 (January 1, 2025): 266–79. https://doi.org/10.1109/TCAD.2024.3404413.

Guo, C., F. Cheng, Z. Du, J. Kiessling, J. Ku, S. Li, Z. Li, et al. “A Survey: Collaborative Hardware and Software Design in the Era of Large Language Models.” IEEE Circuits and Systems Magazine 25, no. 1 (January 1, 2025): 35–57. https://doi.org/10.1109/MCAS.2024.3476008.

Zhou, G., B. Korrapati, G. R. Reddy, C. C. Chang, J. Pan, J. Hu, Y. Chen, and D. G. Thakurta. “PatternPaint: Practical Layout Pattern Generation Using Diffusion-Based Inpainting.” In Proceedings Design Automation Conference, 2025. https://doi.org/10.1109/DAC63849.2025.11132857.

Chen, Y. “2025Q3 Issue of the IEEE Transactions on Circuits and Systems for Artificial Intelligence.” IEEE Transactions on Circuits and Systems for Artificial Intelligence 2, no. 3 (January 1, 2025): 183–84. https://doi.org/10.1109/TCASAI.2025.3599420.

Hao, Q., K. N. Chen, S. K. Goel, H. Li, and E. J. Marinissen. “Guest Editorial 2.5D/3D Chiplet Circuits and Systems, EDA, Advanced Packaging, and Test - Part I.” IEEE Journal on Emerging and Selected Topics in Circuits and Systems 15, no. 3 (January 1, 2025): 362–67. https://doi.org/10.1109/JETCAS.2025.3600772.

Jiang, T., Y. Wang, H. Ye, Z. Shao, J. Sun, J. Zhang, Z. Chen, Y. Chen, and H. Li. “SADA: Stability-guided Adaptive Diffusion Acceleration.” In Proceedings of Machine Learning Research, 267:27649–69, 2025.

Sridhar, A., C. C. Chang, J. Zhang, and Y. Chen. “Improving Routability Prediction via NAS Using a Smooth One-Shot Augmented Predictor.” In Proceedings International Symposium on Quality Electronic Design Isqed, 2025. https://doi.org/10.1109/ISQED65160.2025.11014419.

Zhang, J., H. Yang, A. Li, X. Guo, P. Wang, H. Wang, Y. Chen, and H. Li. “MLLM-LLaVA-FL: Multimodal Large Language Model Assisted Federated Learning.” In Proceedings 2025 IEEE Winter Conference on Applications of Computer Vision Wacv 2025, 4066–76, 2025. https://doi.org/10.1109/WACV61041.2025.00400.

Hao, Q. F., K. N. Chen, S. K. Goel, H. Li, and E. J. Marinissen. “Guest Editorial: 2.5-D/3-D Chiplet Circuits and Systems, EDA, Advanced Packaging, and Test—Part II.” IEEE Journal on Emerging and Selected Topics in Circuits and Systems 15, no. 4 (January 1, 2025): 509–13. https://doi.org/10.1109/JETCAS.2025.3637354.

Molom-Ochir, T., B. Taylor, H. H. Li, and Y. Chen. “MonoSparse-CAM: Efficient Tree Model Processing via Monotonicity and Sparsity in CAMs.” In Proceedings IEEE International Symposium on Circuits and Systems, 2025. https://doi.org/10.1109/ISCAS56072.2025.11043997.

Gopal, B., H. Yang, J. Zhang, M. Horton, and Y. Chen. “Boosting Adversarial Robustness with CLAT: Criticality-Leveraged Adversarial Training.” In Proceedings of Machine Learning Research, 267:20142–61, 2025.

Jia, Y., S. Vahidian, J. Sun, J. Zhang, V. Kungurtsev, N. Z. Gong, and Y. Chen. “Unlocking the Potential of Federated Learning: The Symphony of Dataset Distillation via Deep Generative Latents.” In Lecture Notes in Computer Science, 15136 LNCS:18–33, 2025. https://doi.org/10.1007/978-3-031-73229-4_2.

Pan, J., I. Jacobson, Z. Zhao, T. C. Chen, G. Zhou, C. C. Chang, V. Rashingkar, and Y. Chen. “CROP: Circuit Retrieval and Optimization with Parameter Guidance using LLMs.” In IEEE ACM International Conference on Computer Aided Design Digest of Technical Papers Iccad, 2025. https://doi.org/10.1109/ICCAD66269.2025.11240643.

Alorf, A., B. Taylor, and Y. Chen. “Effect of Capacitor Mismatch Nonlinearity on Inference Accuracy in Analog Compute-in-Memory Architectures.” In Proceedings IEEE International Symposium on Circuits and Systems, 2025. https://doi.org/10.1109/ISCAS56072.2025.11043903.