Publications

2014

Mao, M., G. Sun, Y. Li, A. K. Jones, and Y. Chen. “Prefetching techniques for STT-RAM based last-level cache in CMP systems.” In Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, 67–72, 2014. https://doi.org/10.1109/ASPDAC.2014.6742868.

Guo, J., Z. Chen, D. Wang, Z. Shao, and Y. Chen. “DPA: A data pattern aware error prevention technique for NAND flash lifetime extension.” In Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, 592–97, 2014. https://doi.org/10.1109/ASPDAC.2014.6742955.

Liu, X., Y. Li, Y. Zhang, A. K. Jones, and Y. Chen. “STD-TLB: A STT-RAM-based dynamically-configurable translation lookaside buffer for GPU architectures.” In Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, 355–60, 2014. https://doi.org/10.1109/ASPDAC.2014.6742915.

Li, B., Y. Wang, Y. Weng, Y. Chen, and H. Yang. “Training itself: Mixed-signal training acceleration for memristor-based neural network.” In Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, 361–66, 2014. https://doi.org/10.1109/ASPDAC.2014.6742916.

Liu, X., M. Mao, H. Li, Y. Chen, H. Jiang, J. J. Yang, Q. Wu, and M. Barnell. “A heterogeneous computing system with memristor-based neuromorphic accelerators.” In 2014 IEEE High Performance Extreme Computing Conference, HPEC 2014, 2014. https://doi.org/10.1109/HPEC.2014.7040986.

Wang, D., J. Guo, K. Bu, and Y. Chen. “Reduction of data prevention cost and improvement of reliability in MLC NAND flash storage system.” In 2014 International Conference on Computing, Networking and Communications, ICNC 2014, 259–63, 2014. https://doi.org/10.1109/ICCNC.2014.6785342.

Wang, Jianxing, Pooja Roy, Weng-Fai Wong, Xiuyuan Bi, and Hai Helen Li. “Optimizing MLC-based STT-RAM Caches by Dynamic Block Size Reconfiguration.” In 2014 32ND IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN (ICCD), 126–31. IEEE, 2014.

Wen, W., Y. Zhang, M. Mao, and Y. Chen. “STT-RAM reliability enhancement through ECC and access scheme optimization.” In Proceedings of the International Symposium on Consumer Electronics, ISCE, 2014. https://doi.org/10.1109/ISCE.2014.6884324.

Li, B., Y. Wang, Y. Chen, H. H. Li, and H. Yang. “ICE: Inline calibration for memristor crossbar-based computing engine.” In Proceedings -Design, Automation and Test in Europe, DATE, 2014. https://doi.org/10.7873/DATE2014.197.

Chen, L., C. Li, T. Huang, H. G. Ahmad, and Y. Chen. “A phenomenological memristor model for short-term/long-term memory.” Physics Letters, Section A: General, Atomic and Solid State Physics 378, no. 40 (January 1, 2014): 2924–30. https://doi.org/10.1016/j.physleta.2014.08.018.

Nixon, K. W., X. Chen, H. Zhou, Y. Liu, and Y. Chen. “Mobile GPU power consumption reduction via dynamic resolution and frame rate scaling.” In 6th Workshop on Power-Aware Computing and Systems, HotPower 2014, 2014.

Dong, Zhekang, Shukai Duan, Xiaofang Hu, Lidan Wang, and Hai Li. “A novel memristive multilayer feedforward small-world neural network with its applications in PID control.” TheScientificWorldJournal 2014 (January 2014): 394828. https://doi.org/10.1155/2014/394828.

Bu, K., Y. R. Chen, H. Xu, W. Yi, and Q. Y. Xie. “NAND flash service lifetime estimate with recovery effect and retention time relaxation.” Journal of Central South University 21, no. 8 (January 1, 2014): 3205–13. https://doi.org/10.1007/s11771-014-2292-x.

Park, E., S. Yoo, S. Lee, and H. Li. “Accelerating graph computation with racetrack memory and pointer-assisted graph representation.” In Proceedings -Design, Automation and Test in Europe, DATE, 2014. https://doi.org/10.7873/DATE2014.172.

Zhang, C., G. Sun, P. Li, T. Wang, D. Niu, and Y. Chen. “SBAC: A statistics based cache bypassing method for asymmetric-access caches.” In Proceedings of the International Symposium on Low Power Electronics and Design, 345–50, 2014. https://doi.org/10.1145/2627369.2627611.

Chen, X., K. W. Nixon, H. Zhou, Y. Liu, and Y. Chen. “FingerShadow: An OLED power optimization based on smartphone touch interactions.” In 6th Workshop on Power-Aware Computing and Systems, HotPower 2014, 2014.

Wang, Y., B. Li, R. Luo, Y. Chen, N. Xu, and H. Yang. “Energy efficient neural networks for big data analytics.” In Proceedings -Design, Automation and Test in Europe, DATE, 2014. https://doi.org/10.7873/DATE2014.358.

Mao, M., W. Wen, Y. Zhang, Y. Chen, and H. Li. “Exploration of GPGPU register file architecture using domain-wall-shift- write based racetrack memory.” In Proceedings - Design Automation Conference, 2014. https://doi.org/10.1145/2593069.2593137.

Sun, G., Y. Joo, Y. Chen, and Y. Xie. “A hybrid solid-state storage architecture for the performance, energy consumption, and lifetime improvement.” In Emerging Memory Technologies: Design, Architecture, and Applications, 9781441995513:51–77, 2014. https://doi.org/10.1007/978-1-4419-9551-3_3.

Wen, W., Y. Zhang, M. Mao, and Y. Chen. “State-restrict MLC stt-ram designs for high-reliable high-performance memory system.” In Proceedings - Design Automation Conference, 2014. https://doi.org/10.1145/2593069.2593220.

Eken, E., Y. Zhang, W. Wen, R. Joshi, H. Li, and Y. Chen. “A new field-assisted access scheme of STT-RAM with self-reference capability.” In Proceedings - Design Automation Conference, 2014. https://doi.org/10.1145/2593069.2593075.

Sun, G., X. Dong, Y. Chen, and Y. Xie. “An energy-efficient 3D stacked STT-RAM cache architecture for CMPs.” In Emerging Memory Technologies: Design, Architecture, and Applications, 9781441995513:145–67, 2014. https://doi.org/10.1007/978-1-4419-9551-3_6.

Wu, Q., B. Liu, Y. Chen, H. Li, Q. Chen, and Q. Qiu. “Bio-inspired computing with resistive memories - Models, architectures and applications.” In Proceedings - IEEE International Symposium on Circuits and Systems, 834–37, 2014. https://doi.org/10.1109/ISCAS.2014.6865265.

Chen, X., Y. Chen, M. Dong, and C. Zhang. “Demystifying energy usage in smartphones.” In Proceedings - Design Automation Conference, 2014. https://doi.org/10.1145/2593069.2596676.

Cavallaro, J. R., T. Zhang, A. K. Jones, and H. Li. “GLSVLSI'14 chairs' welcome.” In Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI, 2014.