Publications
2015
Liu, B., Y. Chen, B. Wysocki, and T. Huang. “Reconfigurable Neuromorphic Computing System with Memristor-Based Synapse Design.” Neural Processing Letters 41, no. 2 (April 1, 2015): 159–67. https://doi.org/10.1007/s11063-013-9315-8.
Zhang, L., N. Ge, J. Joshua Yang, Z. Li, R. Stanley Williams, and Y. Chen. “Low voltage two-state-variable memristor model of vacancy-drift resistive switches.” Applied Physics A: Materials Science and Processing 119, no. 1 (April 1, 2015): 1–9. https://doi.org/10.1007/s00339-015-9033-3.
Xie, M., C. Pan, J. Hu, C. Yang, and Y. Chen. “Checkpoint-aware instruction scheduling for nonvolatile processor with multiple functional units.” In 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015, 316–21, 2015. https://doi.org/10.1109/ASPDAC.2015.7059024.
Liu, X., M. Mao, X. Bi, H. Li, and Y. Chen. “An efficient STT-RAM-based register file in GPU architectures.” In 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015, 490–95, 2015. https://doi.org/10.1109/ASPDAC.2015.7059054.
Zhang, C., G. Sun, W. Zhang, F. Mi, H. Li, and W. Zhao. “Quantitative modeling of racetrack memory, a tradeoff among area, performance, and power.” In 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015, 100–105, 2015. https://doi.org/10.1109/ASPDAC.2015.7058988.
Wen, Shiping, Tingwen Huang, Zhigang Zeng, Yiran Chen, and Peng Li. “Circuit design and exponential stabilization of memristive neural networks.” Neural Networks : The Official Journal of the International Neural Network Society 63 (March 2015): 48–56. https://doi.org/10.1016/j.neunet.2014.10.011.
Tang, T., R. Luo, B. Li, H. Li, Y. Wang, and H. Yang. “Energy efficient spiking neural network design with RRAM devices.” In Proceedings of the 14th International Symposium on Integrated Circuits, ISIC 2014, 268–71, 2015. https://doi.org/10.1109/ISICIR.2014.7029565.
Li, H., X. Liu, M. Mao, Y. Chen, Q. Wu, and M. Barnell. “Neuromorphic hardware acceleration enabled by emerging technologies (Invited paper).” In Proceedings of the 14th International Symposium on Integrated Circuits, ISIC 2014, 124–27, 2015. https://doi.org/10.1109/ISICIR.2014.7029530.
Liu, B., H. Li, Y. Chen, X. Li, T. Huang, Q. Wu, and M. Barnell. “Reduction and IR-drop compensations techniques for reliable neuromorphic computing systems.” In IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD, 2015-January:63–70, 2015. https://doi.org/10.1109/ICCAD.2014.7001330.
Wang, Yu-ying, Long-biao He, Hai-jiang Zhu, and Ping Yang. “CONSISTENCY OF SURFACE PULSE AND RECIPROCITY CALIBRATION OF PIEZOELECTRIC AE SENSORS.” In PROCEEDINGS OF THE 2015 SYMPOSIUM ON PIEZOELECTRICITY, ACOUSTIC WAVES AND DEVICE APPLICATIONS, edited by X. Tao, X. Zhao, C. Wang, and F. Yu, 189–92. IEEE, 2015.
Chen, L., C. Li, T. Huang, S. Wen, and Y. Chen. “Memristor crossbar array for image storing.” In Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), 9377 LNCS:166–73, 2015. https://doi.org/10.1007/978-3-319-25393-0_19.
Wang, P., E. Eken, W. Zhang, R. Joshi, R. Kanj, and Y. Chen. “A thermal and process variation aware MTJ switching model and its applications in soft error analysis.” In More than Moore Technologies for Next Generation Computer Design, 101–25, 2015. https://doi.org/10.1007/978-1-4939-2163-8_5.
Wen, W., Y. Zhang, and Y. Chen. “Statistical reliability/energy characterization in STT-RAM cell designs.” In Spintronics-Based Computing, 201–30, 2015. https://doi.org/10.1007/978-3-319-15180-9_7.
2014
Qiu, Q., Z. Li, K. Ahmed, H. H. Li, and M. Hu. “Neuromorphic acceleration for context aware text image recognition.” In IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation, 2014. https://doi.org/10.1109/SiPS.2014.6986098.
Wang, J., P. Roy, W. F. Wong, X. Bi, and H. Li. “Optimizing MLC-based STT-RAM caches by dynamic block size reconfiguration.” In 2014 32nd IEEE International Conference on Computer Design, ICCD 2014, 133–38, 2014. https://doi.org/10.1109/ICCD.2014.6974672.
Li, H., M. Hu, X. Liu, M. Mao, C. Li, and S. Duan. “Emerging memristor technology enabled next generation cortical processor.” In International System on Chip Conference, 377–82, 2014. https://doi.org/10.1109/SOCC.2014.6948958.
Eken, E., Y. Zhang, W. Wen, R. Joshi, H. Li, and Y. Chen. “A novel self-reference technique for STT-RAM read and write reliability enhancement.” IEEE Transactions on Magnetics 50, no. 11 (November 1, 2014). https://doi.org/10.1109/TMAG.2014.2323196.
Wen, W., Y. Zhang, Y. Chen, Y. Wang, and Y. Xie. “PS3-RAM: A fast portable and scalable statistical STT-RAM reliability/energy analysis method.” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 33, no. 11 (November 1, 2014): 1644–56. https://doi.org/10.1109/TCAD.2014.2351581.
Chen, Y., J. Guo, and Z. Sun. “CPU-GPU system designs for high performance cloud computing.” In High Performance Cloud Auditing and Applications, 9781461432968:283–99, 2014. https://doi.org/10.1007/978-1-4614-3296-8_11.
Bayram, I., and Y. Chen. “NV-TCAM: Alternative interests and practices in NVM designs.” In 2014 IEEE Non-Volatile Memory Systems and Applications Symposium, NVMSA 2014, 2014. https://doi.org/10.1109/NVMSA.2014.6927206.
Pan, C., M. Xie, J. Hu, Y. Chen, and C. Yang. “3M-PCM: Exploiting multiple write modes MLC phase change main memory in embedded systems.” In 2014 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2014, 2014. https://doi.org/10.1145/2656075.2656076.
Hu, Miao, Hai Li, Yiran Chen, Qing Wu, Garrett S. Rose, and Richard W. Linderman. “Memristor crossbar-based neuromorphic computing system: a case study.” IEEE Transactions on Neural Networks and Learning Systems 25, no. 10 (October 2014): 1864–78. https://doi.org/10.1109/tnnls.2013.2296777.
Li, H., M. Hu, C. Li, and S. Duan. “Memristor modeling - Static, statistical, and stochastic methodologies.” In Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI, 406–11, 2014. https://doi.org/10.1109/ISVLSI.2014.108.
Liu, C., and H. Li. “A weighted sensing scheme for ReRAM-based cross-point memory array.” In Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI, 65–70, 2014. https://doi.org/10.1109/ISVLSI.2014.32.
Hu, X., G. Feng, H. Li, Y. Chen, and S. Duan. “An adjustable memristor model and its application in small-world neural networks.” In Proceedings of the International Joint Conference on Neural Networks, 7–14, 2014. https://doi.org/10.1109/IJCNN.2014.6889605.