Publications

Chen, Y., and H. Li. “Patents relevant to cross-point memory array.” Recent Patents on Electrical Engineering 3, no. 2 (June 25, 2010): 114–24. https://doi.org/10.2174/1874476111003020114.

Wang, X., and Y. Chen. “Spintronic memristor devices and application.” In Proceedings -Design, Automation and Test in Europe, DATE, 667–72, 2010.

Chen, Y., H. Li, X. Wang, W. Zhu, W. Xu, and T. Zhang. “A nondestructive self-reference scheme for spin-transfer torque random access memory (STT-RAM).” In Proceedings -Design, Automation and Test in Europe, DATE, 148–53, 2010.

Li, H., and M. Hu. “Compact model of memristors and its application in computing systems.” In Proceedings -Design, Automation and Test in Europe, DATE, 673–78, 2010.

Chen, Y., W. Tian, H. Li, X. Wang, and W. Zhu. “Scalability of PCMO-based resistive switch device in DSM technologies.” In Proceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010, 327–32, 2010. https://doi.org/10.1109/ISQED.2010.5450447.

Xi, H., J. Stricklin, H. Li, Y. Chen, X. Wang, Y. Zheng, Z. Gao, and M. X. Tang. “Spin transfer torque memory with thermal assist mechanism: A case study.” IEEE Transactions on Magnetics 46, no. 3 PART 2 (March 1, 2010): 860–65. https://doi.org/10.1109/TMAG.2009.2033674.

Sun, G., Y. Joo, Y. Chen, D. Niu, Y. Xie, and H. Li. “A hybrid solid-state storage architecture for the performance, energy consumption, and lifetime improvement.” In Proceedings - International Symposium on High-Performance Computer Architecture, 2010. https://doi.org/10.1109/hpca.2010.5416650.

Xu, W., T. Zhang, and Y. Chen. “Design of spin-torque transfer magnetoresistive RAM and CAM/TCAM with high sensing and search Speed.” IEEE Transactions on Very Large Scale Integration (VLSI) Systems 18, no. 1 (January 1, 2010): 66–74. https://doi.org/10.1109/TVLSI.2008.2007735.

Wang, X., and Y. Chen. “Patents relevant to spintronic memristor.” Recent Patents on Electrical Engineering 3, no. 1 (January 1, 2010): 10–18. https://doi.org/10.2174/1874476111003010010.

Wang, X., Y. Chen, and T. Zhang. “Magnetization Switching in Spin Torque Random Access Memory: Challenges and Opportunities.” In Analog Circuits and Signal Processing, 253–94, 2010. https://doi.org/10.1007/978-90-481-9216-8_9.

Wang, X., Y. Chen, Y. Gu, and H. Li. “Spintronic memristor temperature sensor.” IEEE Electron Device Letters 31, no. 1 (January 1, 2010): 20–22. https://doi.org/10.1109/LED.2009.2035643.

Chen, Y., H. Li, C. K. Koh, J. Li, K. Roy, G. Sun, and Y. Xie. “Variable-Latency Adder (VL-Adder) Designs for Low Power and NBTI Tolerance.” IEEE Transactions on Very Large Scale Integration (VLSI) Systems 18, no. 11 (January 1, 2010): 1621–24. https://doi.org/10.1109/TVLSI.2009.2026280.

Sun, Z., H. Li, Y. Chen, and X. Wang. “Variation tolerant sensing scheme of spin-transfer torque memory for yield improvement.” In IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD, 432–37, 2010. https://doi.org/10.1109/ICCAD.2010.5653720.

Chen, Y., H. Li, K. Roy, and C. K. Koh. “Gated decap: Gate leakage control of on-chip decoupling capacitors in scaled technologies.” IEEE Transactions on Very Large Scale Integration (VLSI) Systems 17, no. 12 (December 1, 2009): 1749–52. https://doi.org/10.1109/TVLSI.2008.2007843.

Koh, C. K., W. F. Wong, Y. Chen, and H. Li. “The salvage cache: A fault-tolerant cache architecture for next-generation memory technologies.” In Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors, 268–74, 2009. https://doi.org/10.1109/ICCD.2009.5413145.

Chen, Y., and X. Wang. “Compact modeling and corner analysis of spintronic memristor.” In 2009 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2009, 7–12, 2009. https://doi.org/10.1109/NANOARCH.2009.5226363.

Hai, L., and C. Yiran. “An overview of non-volatile memory technology and the implication for tools and architectures.” In Proceedings -Design, Automation and Test in Europe, DATE, 731–36, 2009.

Li, H., H. Xi, Y. Chen, J. Stricklin, X. Wang, and T. Zhang. “Thermal-assisted spin transfer torque memory (STT-RAM) cell design exploration.” In Proceedings of the 2009 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2009, 217–22, 2009. https://doi.org/10.1109/ISVLSI.2009.17.

Koh, C. K., W. F. Wong, Y. Chen, and H. Li. “Tolerating process variations in large, set-associative caches: The buddy cache.” Transactions on Architecture and Code Optimization 6, no. 2 (June 1, 2009). https://doi.org/10.1145/1543753.1543757.

Xi, H., X. Wang, Y. Chen, and P. J. Ryan. “Ordering of magnetic nanoparticles in bilayer structures.” Journal of Physics D: Applied Physics 42, no. 1 (April 8, 2009). https://doi.org/10.1088/0022-3727/42/1/015006.

Wang, X., Y. Chen, H. Xi, H. Li, and D. Dimitrov. “Spintronic memristor through spin-thorque-induced magnetization motion.” IEEE Electron Device Letters 30, no. 3 (February 12, 2009): 294–97. https://doi.org/10.1109/LED.2008.2012270.

Xu, W., Y. Chen, X. Wang, and T. Zhang. “Improving STT MRAM storage density through smaller-than-worst-case transistor sizing.” In Proceedings - Design Automation Conference, 87–90, 2009. https://doi.org/10.1145/1629911.1629936.

Sun, G., X. Dong, Y. Xie, J. Li, and Y. Chen. “A novel architecture of the 3D stacked MRAM L2 Cache for CMPs.” In Proceedings - International Symposium on High-Performance Computer Architecture, 239–49, 2009. https://doi.org/10.1109/HPCA.2009.4798259.

Xu, W., T. Zhang, and Y. Chen. “Spin-transfer torque magnetoresistive content addressable memory (CAM) cell structure design with enhanced search noise margin.” In Proceedings - IEEE International Symposium on Circuits and Systems, 1898–1901, 2008. https://doi.org/10.1109/ISCAS.2008.4541813.

Dong, X., X. Wu, G. Sun, Y. Xie, H. Li, and Y. Chen. “Circuit and microarchitecture evaluation of 3D stacking magnetic RAM (MRAM) as a universal memory replacement.” In Proceedings - Design Automation Conference, 554–59, 2008. https://doi.org/10.1109/DAC.2008.4555878.