Publications

2011

Chen, Y. C., H. Li, Y. Chen, and R. E. Pino. “3D-ICML: A 3D bipolar ReRAM design with interleaved complementary memory layers.” In Proceedings Design Automation and Test in Europe Date, 583–86, 2011.

Dong, X., X. Wu, Y. Xie, Y. Chen, and H. Li. “Stacking magnetic random access memory atop microprocessors: An architecture-level evaluation.” IET Computers and Digital Techniques 5, no. 3 (May 1, 2011): 213–20. https://doi.org/10.1049/iet-cdt.2009.0091.

Hu, M., H. Li, Y. Chen, X. Wang, and R. E. Pino. “Geometry variations analysis of TiO2 thin-film and spintronic memristors.” In Proceedings of the Asia and South Pacific Design Automation Conference ASP DAC, 25–30, 2011. https://doi.org/10.1109/ASPDAC.2011.5722193.

Chen, Y., and H. Li. “Emerging sensing techniques for emerging memories.” In Proceedings of the Asia and South Pacific Design Automation Conference ASP DAC, 204–10, 2011. https://doi.org/10.1109/ASPDAC.2011.5722185.

Xu, W., H. Sun, X. Wang, Y. Chen, and T. Zhang. “Design of last-level on-chip cache using spin-torque transfer RAM (STT RAM).” IEEE Transactions on Very Large Scale Integration VLSI Systems 19, no. 3 (March 1, 2011): 483–93. https://doi.org/10.1109/TVLSI.2009.2035509.

Zhang, Y., X. Wang, H. Li, and Y. Chen. “STT-RAM cell optimization considering MTJ and CMOS variations.” IEEE Transactions on Magnetics 47, no. 10 (January 1, 2011): 2962–65. https://doi.org/10.1109/TMAG.2011.2158810.

Li, H., X. Wang, Z. L. Ong, W. F. Wong, Y. Zhang, P. Wang, and Y. Chen. “Performance, power, and reliability tradeoffs of STT-RAM cell subject to architecture-level requirement.” IEEE Transactions on Magnetics 47, no. 10 (January 1, 2011): 2356–59. https://doi.org/10.1109/TMAG.2011.2159262.

Joshi, Rajiv, Rouwaida Kanj, Peiyuan Wang, and Hai Helen Li. “Universal Statistical Cure For Predicting Memory Loss (Invited Paper).” In 2011 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN (ICCAD), 236–39. IEEE, 2011.

Zhang, Y., W. Wen, and Y. Chen. “Asymmetry in STT-RAM cell operations.” In Emerging Memory Technologies Design Architecture and Applications, 9781441995513:117–44, 2011. https://doi.org/10.1007/978-1-4419-9551-3_5.

Zhu, W., H. Li, Y. Chen, and X. Wang. “Current switching in MgO-based magnetic tunneling junctions.” IEEE Transactions on Magnetics 47, no. 1 PART 2 (January 1, 2011): 156–60. https://doi.org/10.1109/TMAG.2010.2085441.

Hu, M., H. H. Li, Y. Chen, and X. Wang. “Spintronic memristor: Compact model and statistical analysis.” Journal of Low Power Electronics 7, no. 2 (January 1, 2011): 234–44. https://doi.org/10.1166/jolpe.2011.1131.

Wang, P., X. Wang, Y. Zhang, H. Li, S. P. Levitan, and Y. Chen. “Nonpersistent errors optimization in spin-MOS logic and storage circuitry.” IEEE Transactions on Magnetics 47, no. 10 (January 1, 2011): 3860–63. https://doi.org/10.1109/TMAG.2011.2153838.

2010

Chen, Y., X. Wang, H. Li, H. Xi, Y. Yan, and W. Zhu. “Design margin exploration of spin-transfer torque RAM (STT-RAM) in scaled technologies.” IEEE Transactions on Very Large Scale Integration (VLSI) Systems 18, no. 12 (December 1, 2010): 1724–34. https://doi.org/10.1109/TVLSI.2009.2032192.

Chen, Y., H. Li, X. Wang, and J. Park. “Applications of TMR devices in solid state circuits and systems.” In 2010 International Soc Design Conference Isocc 2010, 252–55, 2010. https://doi.org/10.1109/SOCDC.2010.5682923.

Chen, Y., H. Li, and X. Wang. “Spintronic devices: From memory to memristor.” In 2010 International Conference on Communications Circuits and Systems Icccas 2010 Proceedings, 811–16, 2010. https://doi.org/10.1109/ICCCAS.2010.5581868.

Niu, D., Y. Chen, and Y. Xie. “Low-power dual-element memristor based memory design.” In Proceedings of the International Symposium on Low Power Electronics and Design, 25–30, 2010. https://doi.org/10.1145/1840845.1840851.

Chen, Y., H. Li, X. Wang, W. Zhu, W. Xu, and T. Zhang. “Combined magnetic-and circuit-level enhancements for the nondestructive self-reference scheme of STT-RAM.” In Proceedings of the International Symposium on Low Power Electronics and Design, 1–6, 2010. https://doi.org/10.1145/1840845.1840847.

Li, H., and Y. Chen. “Emerging non-volatile memory technologies: From materials, to device, circuit, and architecture.” In Midwest Symposium on Circuits and Systems, 1–4, 2010. https://doi.org/10.1109/MWSCAS.2010.5548590.

Chen, Y., X. Wang, W. Zhu, H. Li, Z. Sun, G. Sun, and Y. Xie. “Access scheme of multi-level cell spin-transfer torque random access memory and its optimization.” In Midwest Symposium on Circuits and Systems, 1109–12, 2010. https://doi.org/10.1109/MWSCAS.2010.5548848.

Chen, Y., X. Wang, Z. Sun, and H. Li. “The application of spintronic devices in magnetic bio-sensing.” In Proceedings of the 2nd Asia Symposium on Quality Electronic Design, ASQED 2010, 230–34, 2010. https://doi.org/10.1109/ASQED.2010.5548244.

Niu, D., Y. Chen, C. Xu, and Y. Xie. “Impact of process variations on emerging memristor.” In Proceedings Design Automation Conference, 877–82, 2010. https://doi.org/10.1145/1837274.1837495.

Chen, Y., W. Tian, H. Li, X. Wang, and W. Zhu. “PCMO device with high switching stability.” IEEE Electron Device Letters 31, no. 8 (August 1, 2010): 866–68. https://doi.org/10.1109/LED.2010.2050457.

Chen, Y., and H. Li. “Patents relevant to cross-point memory array.” Recent Patents on Electrical Engineering 3, no. 2 (June 25, 2010): 114–24. https://doi.org/10.2174/1874476111003020114.

Chen, Y., H. Li, X. Wang, W. Zhu, W. Xu, and T. Zhang. “A nondestructive self-reference scheme for spin-transfer torque random access memory (STT-RAM).” In Proceedings Design Automation and Test in Europe Date, 148–53, 2010.

Li, H., and M. Hu. “Compact model of memristors and its application in computing systems.” In Proceedings Design Automation and Test in Europe Date, 673–78, 2010.