Publications

Ji, F., H. H. Li, B. Wysocki, C. Thiem, and N. McDonald. “Memristor-based synapse design and a case study in reconfigurable systems.” In Proceedings of the International Joint Conference on Neural Networks, 2013. https://doi.org/10.1109/IJCNN.2013.6706776.

Wen, Shiping, Gang Bao, Zhigang Zeng, Yiran Chen, and Tingwen Huang. “Global exponential synchronization of memristor-based recurrent neural networks with time-varying delays.” Neural Networks : The Official Journal of the International Neural Network Society 48 (December 2013): 195–203. https://doi.org/10.1016/j.neunet.2013.10.001.

Chen, Z., L. Zhang, X. Bi, and H. Li. “A pseudo-weighted sensing scheme for memristor based cross-point memory.” In Proceedings of the 2013 IEEE ACM International Symposium on Nanoscale Architectures Nanoarch 2013, 38–39, 2013. https://doi.org/10.1109/NanoArch.2013.6623039.

Wen, S., Z. Zeng, T. Huang, and Y. Chen. “Fuzzy modeling and synchronization of different memristor-based chaotic circuits.” Physics Letters Section A General Atomic and Solid State Physics 377, no. 34–36 (November 1, 2013): 2016–21. https://doi.org/10.1016/j.physleta.2013.05.046.

Chen, Y., W. F. Wong, H. Li, C. K. Koh, Y. Zhang, and W. Wen. “On-chip caches built on multilevel spin-transfer torque RAM cells and its optimizations.” ACM Journal on Emerging Technologies in Computing Systems 9, no. 2 (October 21, 2013). https://doi.org/10.1145/2463585.2463592.

Hu, M., H. Li, Y. Chen, Q. Wu, and G. S. Rose. “BSB training scheme implementation on memristor-based circuit.” In Proceedings of the 2013 IEEE Symposium on Computational Intelligence for Security and Defense Applications Cisda 2013 2013 IEEE Symposium Series on Computational Intelligence Ssci 2013, 80–87, 2013. https://doi.org/10.1109/CISDA.2013.6595431.

Wen, S., Z. Zeng, T. Huang, and Y. Chen. “Passivity analysis of memristor-based recurrent neural networks with time-varying delays.” Journal of the Franklin Institute 350, no. 8 (October 1, 2013): 2354–70. https://doi.org/10.1016/j.jfranklin.2013.05.026.

Zhao, B., J. Yang, Y. Zhang, Y. Chen, and H. Li. “Common-source-line array: An area efficient memory architecture for bipolar nonvolatile devices.” ACM Transactions on Design Automation of Electronic Systems 18, no. 4 (October 1, 2013). https://doi.org/10.1145/2500459.

Zhang, Y., L. Zhang, and Y. Chen. “MLC STT-RAM design considering probabilistic and asymmetric MTJ switching.” In Proceedings IEEE International Symposium on Circuits and Systems, 113–16, 2013. https://doi.org/10.1109/ISCAS.2013.6571795.

Sun, Z., W. Wu, and H. Li. “Cross-layer racetrack memory design for ultra high density and low power consumption.” In Proceedings Design Automation Conference, 2013. https://doi.org/10.1145/2463209.2488799.

Mao, M., H. Li, A. K. Jones, and Y. Chen. “Coordinating prefetching and STT-RAM based last-level cache management for multicore systems.” In Proceedings of the ACM Great Lakes Symposium on VLSI Glsvlsi, 55–60, 2013. https://doi.org/10.1145/2483028.2483060.

Nixon, K. W., X. Chen, Z. H. Mao, Y. Chen, and K. Li. “Mobile user classification and authorization based on gesture usage recognition.” In Proceedings of the Asia and South Pacific Design Automation Conference ASP DAC, 384–89, 2013. https://doi.org/10.1109/ASPDAC.2013.6509626.

Wen, W., Y. Zhang, L. Zhang, and Y. Chen. “Loadsa: A yield-driven top-down design method for STT-RAM array.” In Proceedings of the Asia and South Pacific Design Automation Conference ASP DAC, 291–96, 2013. https://doi.org/10.1109/ASPDAC.2013.6509611.

Li, Q., J. Li, L. Shi, C. J. Xue, Y. Chen, and Y. He. “Compiler-assisted refresh minimization for volatile STT-RAM cache.” In Proceedings of the Asia and South Pacific Design Automation Conference ASP DAC, 273–78, 2013. https://doi.org/10.1109/ASPDAC.2013.6509608.

Zhang, L., Z. Chen, J. Joshua Yang, B. Wysocki, N. McDonald, and Y. Chen. “A compact modeling of TiO2-TiO2-x memristor.” Applied Physics Letters 102, no. 15 (April 15, 2013). https://doi.org/10.1063/1.4802206.

Chen, X., Y. Chen, Z. Ma, and F. C. A. Fernandes. “How is energy consumed in smartphone display applications?” In ACM Hotmobile 2013 the 14th Workshop on Mobile Computing Systems and Applications, 2013. https://doi.org/10.1145/2444776.2444781.

Bi, X., M. A. Weldon, and H. Li. “STT-RAM designs supporting dual-port accesses.” In Proceedings Design Automation and Test in Europe Date, 853–58, 2013. https://doi.org/10.7873/date.2013.180.

Guo, J., W. Wen, Y. Z. Li, S. Li, H. Li, and Y. Chen. “DA-RAID-5: A disturb aware data protection technique for NAND flash storage systems.” In Proceedings Design Automation and Test in Europe Date, 380–85, 2013. https://doi.org/10.7873/date.2013.087.

Zhao, M., H. Zhang, X. Chen, Y. Chen, and C. J. Xue. “Online OLED dynamic voltage scaling for video streaming applications on mobile devices.” In 2013 International Conference on Hardware Software Codesign and System Synthesis Codes Isss 2013, 2013. https://doi.org/10.1109/CODES-ISSS.2013.6658996.

Liu, B., M. Hu, H. Li, Z. H. Mao, Y. Chen, T. Huang, and W. Zhang. “Digital-assisted noise-eliminating training for memristor crossbar-based analog neuromorphic computing engine.” In Proceedings Design Automation Conference, 2013. https://doi.org/10.1145/2463209.2488741.

Li, J., L. Shi, Q. Li, C. J. Xue, Y. Chen, and Y. Xu. “Cache coherence enabled adaptive refresh for volatile STT-RAM.” In Proceedings Design Automation and Test in Europe Date, 1247–50, 2013. https://doi.org/10.7873/date.2013.258.

Li, Y., Y. Zhang, H. Li, Y. Chen, and A. K. Jones. “C1C: A Configurable, Compiler-Guided STT-RAM L1 Cache.” ACM Transactions on Architecture and Code Optimization 10, no. 4 (January 1, 2013): 1–22. https://doi.org/10.1145/2541228.2555308.

Guo, J., J. Yang, Y. Zhang, and Y. Chen. “Low cost power failure protection for MLC NAND flash storage systems with PRAM/DRAM hybrid buffer.” In Proceedings Design Automation and Test in Europe Date, 859–64, 2013. https://doi.org/10.7873/date.2013.181.

Li, Hong-jun, Zheng-guang Xie, and Wei Hu. “An Image Compression Method using Sparse Representation and Grey Relation.” In PROCEEDINGS OF 2013 IEEE INTERNATIONAL CONFERENCE ON GREY SYSTEMS AND INTELLIGENT SERVICES (GSIS), 53–56, 2013.

Chen, Y. C., W. Zhang, and H. H. Li. “A hardware security scheme for RRAM-based FPGA.” In 2013 23rd International Conference on Field Programmable Logic and Applications Fpl 2013 Proceedings, 2013. https://doi.org/10.1109/FPL.2013.6645556.