Publications

Li, S., C. Wu, H. Li, B. Li, Y. Wang, and Q. Qiu. “FPGA acceleration of recurrent neural network based language model.” In Proceedings - 2015 IEEE 23rd Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2015, 111–18, 2015. https://doi.org/10.1109/FCCM.2015.50.

Eken, E., Y. Zhang, B. Yan, W. Wu, H. Li, and Y. Chen. “Spin-hall assisted STT-RAM design and discussion.” In 2015 IEEE International Magnetics Conference, INTERMAG 2015, 2015. https://doi.org/10.1109/INTMAG.2015.7156644.

Gu, S., E. H. M. Sha, Q. Zhuge, Y. Chen, and J. Hu. “Area and performance co-optimization for domain wall memory in application-specific embedded systems.” In Proceedings - Design Automation Conference, Vol. 2015-June, 2015. https://doi.org/10.1145/2744769.2744800.

Zhang, Y., Y. Li, Z. Sun, H. Li, Y. Chen, and A. K. Jones. “Read performance: The newest barrier in scaled stt-ram.” IEEE Transactions on Very Large Scale Integration (VLSI) Systems 23, no. 6 (June 1, 2015): 1170–74. https://doi.org/10.1109/TVLSI.2014.2326797.

Zhang, Y., B. Yan, W. Kang, Y. Cheng, J. O. Klein, Y. Chen, and W. Zhao. “Compact model of subvolume MTJ and its design application at nanoscale technology nodes.” IEEE Transactions on Electron Devices 62, no. 6 (June 1, 2015): 2048–55. https://doi.org/10.1109/TED.2015.2414721.

Wang, D. H., H. P. Liu, and Y. R. Chen. “Multi-bit soft error tolerable L1 data cache based on characteristic of data value.” Journal of Central South University 22, no. 5 (May 26, 2015): 1769–75. https://doi.org/10.1007/s11771-015-2695-3.

Liu, B., W. Wen, Y. Chen, X. Li, C. R. Wu, and T. Y. Ho. “EDA challenges for memristor-crossbar based neuromorphic computing.” In Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI, 20-22-May-2015:185–88, 2015. https://doi.org/10.1145/2742060.2743754.

Yan, B., Z. Li, Y. Zhang, J. Yang, W. Zhao, P. C. F. Chia, and H. Li. “A high-speed robust NVM-TCAM design using body bias feedback.” In Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI, 20-22-May-2015:69–74, 2015. https://doi.org/10.1145/2742060.2742077.

Wang, Y., T. Tang, L. Xia, B. Li, P. Gu, H. Li, Y. Xie, and H. Yang. “Energy efficient RRAM spiking neural network for real time classification.” In Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI, 20-22-May-2015:189–94, 2015. https://doi.org/10.1145/2742060.2743756.

Wang, Y., W. Wen, M. Hu, and H. Li. “A novel true random number generator design leveraging emerging memristor technology.” In Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI, 20-22-May-2015:271–76, 2015. https://doi.org/10.1145/2742060.2742088.

Zhang, Y., B. Yan, W. Wu, H. Li, and Y. Chen. “Giant spin hall effect (GSHE) logic design for low power application.” In Proceedings -Design, Automation and Test in Europe, DATE, 2015-April:1000–1005, 2015. https://doi.org/10.7873/date.2015.1118.

Tang, T., L. Xia, B. Li, R. Luo, Y. Chen, Y. Wang, and H. Yang. “Spiking neural network with RRAM: Can we use it for real-world application?” In Proceedings -Design, Automation and Test in Europe, DATE, 2015-April:860–65, 2015. https://doi.org/10.7873/date.2015.1085.

Wright, P. J., A. Raychowdhury, B. Liu, S. Mukhopadhyay, H. H. Li, A. A. Iranmanesh, S. M. Alam, and P. Wesling. “Welcome to ISQED 2015.” In Proceedings - International Symposium on Quality Electronic Design, ISQED, 2015-April:iii, 2015. https://doi.org/10.1109/ISQED.2015.7085359.

Zhang, L., N. Ge, J. Joshua Yang, Z. Li, R. Stanley Williams, and Y. Chen. “Low voltage two-state-variable memristor model of vacancy-drift resistive switches.” Applied Physics A: Materials Science and Processing 119, no. 1 (April 1, 2015): 1–9. https://doi.org/10.1007/s00339-015-9033-3.

Liu, B., Y. Chen, B. Wysocki, and T. Huang. “Reconfigurable Neuromorphic Computing System with Memristor-Based Synapse Design.” Neural Processing Letters 41, no. 2 (April 1, 2015): 159–67. https://doi.org/10.1007/s11063-013-9315-8.

Liu, X., M. Mao, X. Bi, H. Li, and Y. Chen. “An efficient STT-RAM-based register file in GPU architectures.” In 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015, 490–95, 2015. https://doi.org/10.1109/ASPDAC.2015.7059054.

Zhang, C., G. Sun, W. Zhang, F. Mi, H. Li, and W. Zhao. “Quantitative modeling of racetrack memory, a tradeoff among area, performance, and power.” In 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015, 100–105, 2015. https://doi.org/10.1109/ASPDAC.2015.7058988.

Xie, M., C. Pan, J. Hu, C. Yang, and Y. Chen. “Checkpoint-aware instruction scheduling for nonvolatile processor with multiple functional units.” In 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015, 316–21, 2015. https://doi.org/10.1109/ASPDAC.2015.7059024.

Wen, Shiping, Tingwen Huang, Zhigang Zeng, Yiran Chen, and Peng Li. “Circuit design and exponential stabilization of memristive neural networks.” Neural Networks : The Official Journal of the International Neural Network Society 63 (March 2015): 48–56. https://doi.org/10.1016/j.neunet.2014.10.011.

Li, H., X. Liu, M. Mao, Y. Chen, Q. Wu, and M. Barnell. “Neuromorphic hardware acceleration enabled by emerging technologies (Invited paper).” In Proceedings of the 14th International Symposium on Integrated Circuits, ISIC 2014, 124–27, 2015. https://doi.org/10.1109/ISICIR.2014.7029530.

Tang, T., R. Luo, B. Li, H. Li, Y. Wang, and H. Yang. “Energy efficient spiking neural network design with RRAM devices.” In Proceedings of the 14th International Symposium on Integrated Circuits, ISIC 2014, 268–71, 2015. https://doi.org/10.1109/ISICIR.2014.7029565.

Liu, B., H. Li, Y. Chen, X. Li, T. Huang, Q. Wu, and M. Barnell. “Reduction and IR-drop compensations techniques for reliable neuromorphic computing systems.” In IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD, 2015-January:63–70, 2015. https://doi.org/10.1109/ICCAD.2014.7001330.

Wang, Yu-ying, Long-biao He, Hai-jiang Zhu, and Ping Yang. “CONSISTENCY OF SURFACE PULSE AND RECIPROCITY CALIBRATION OF PIEZOELECTRIC AE SENSORS.” In PROCEEDINGS OF THE 2015 SYMPOSIUM ON PIEZOELECTRICITY, ACOUSTIC WAVES AND DEVICE APPLICATIONS, edited by X. Tao, X. Zhao, C. Wang, and F. Yu, 189–92. IEEE, 2015.

Chen, L., C. Li, T. Huang, S. Wen, and Y. Chen. “Memristor crossbar array for image storing.” In Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), 9377 LNCS:166–73, 2015. https://doi.org/10.1007/978-3-319-25393-0_19.

Wang, P., E. Eken, W. Zhang, R. Joshi, R. Kanj, and Y. Chen. “A thermal and process variation aware MTJ switching model and its applications in soft error analysis.” In More than Moore Technologies for Next Generation Computer Design, 101–25, 2015. https://doi.org/10.1007/978-1-4939-2163-8_5.