Publications

Li, H. H., and X. Li. “Message from the general chairs.” In Proceedings of IEEE Computer Society Annual Symposium on VLSI Isvlsi, 2016-September:xvii, 2016. https://doi.org/10.1109/ISVLSI.2016.4.

Liu, C., Q. Yang, B. Yan, J. Yang, X. Du, W. Zhu, H. Jiang, Q. Wu, M. Barnell, and H. H. Li. “A memristor crossbar based computing engine optimized for high speed and accuracy.” In Proceedings of IEEE Computer Society Annual Symposium on VLSI Isvlsi, 2016-September:110–15, 2016. https://doi.org/10.1109/ISVLSI.2016.46.

Qiu, Q., Z. Li, K. Ahmed, W. Liu, S. F. Habib, H. Li, and M. Hu. “A Neuromorphic Architecture for Context Aware Text Image Recognition.” Journal of Signal Processing Systems 84, no. 3 (September 1, 2016): 355–69. https://doi.org/10.1007/s11265-015-1067-4.

Guo, J., C. Min, T. Cai, H. Li, and Y. Chen. “ObjNandSim: Object-based NAND flash device simulator.” In 2016 5th Non Volatile Memory Systems and Applications Symposium Nvmsa 2016, 2016. https://doi.org/10.1109/NVMSA.2016.7547179.

Li, Z., X. Bi, H. H. Li, Y. Chen, J. Qin, P. Guo, W. Kong, et al. “Design and Implementation of a 4Kb STT-MRAM with Innovative 200nm Nano-ring Shaped MTJ.” In Proceedings of the International Symposium on Low Power Electronics and Design, 4–9, 2016. https://doi.org/10.1145/2934583.2934611.

Dallal, Ahmed H., Yiran Chen, Douglas Weber, and Zhi-Hong Mao. “Dictionary learning for sparse representation and classification of neural spikes.” In Annual International Conference of the IEEE Engineering in Medicine and Biology Society. IEEE Engineering in Medicine and Biology Society. Annual International Conference, 2016:3486–89, 2016. https://doi.org/10.1109/embc.2016.7591479.

Jiang, H., W. Zhu, F. Luo, K. Bai, C. Liu, X. Zhang, J. J. Yang, Q. Xia, Y. Chen, and Q. Wu. “Cyclical sensing integrate-and-fire circuit for memristor array based neuromorphic computing.” In Proceedings IEEE International Symposium on Circuits and Systems, 2016-July:930–33, 2016. https://doi.org/10.1109/ISCAS.2016.7527394.

Yan, B., A. M. Mahmoud, J. J. Yang, Q. Wu, Y. Chen, and H. H. Li. “A neuromorphic ASIC design using one-selector-one-memristor crossbar.” In Proceedings IEEE International Symposium on Circuits and Systems, 2016-July:1390–93, 2016. https://doi.org/10.1109/ISCAS.2016.7527509.

Bayram, I., E. Eken, X. Wang, X. Sun, T. P. Ma, and Y. Chen. “Adaptive refreshing and read voltage control scheme for FeDRAM.” In Proceedings IEEE International Symposium on Circuits and Systems, 2016-July:1154–57, 2016. https://doi.org/10.1109/ISCAS.2016.7527450.

Li, S., X. Liu, M. Mao, H. H. Li, Y. Chen, B. Li, and Y. Wang. “Heterogeneous systems with reconfigurable neuromorphic computing accelerators.” In Proceedings IEEE International Symposium on Circuits and Systems, 2016-July:125–28, 2016. https://doi.org/10.1109/ISCAS.2016.7527186.

Liu, B., C. Yang, H. Li, Y. Chen, Q. Wu, and M. Barnell. “Security of neuromorphic systems: Challenges and solutions.” In Proceedings IEEE International Symposium on Circuits and Systems, 2016-July:1326–29, 2016. https://doi.org/10.1109/ISCAS.2016.7527493.

Chakraborty, S., S. Joshi, Q. Xia, H. Li, Y. Chen, H. Jiang, Q. Wu, M. Barnell, and J. J. Yang. “Built-in selectors self-assembled into memristors.” In Proceedings IEEE International Symposium on Circuits and Systems, 2016-July:181–84, 2016. https://doi.org/10.1109/ISCAS.2016.7527200.

Yan, B., Y. Zhang, E. Eken, W. Wen, W. Zhao, and Y. Chen. “Recent progresses of STT memory design and applications.” In Proceedings 2015 IEEE 11th International Conference on ASIC Asicon 2015, 2016. https://doi.org/10.1109/ASICON.2015.7517038.

Pyle, S. D., H. Li, and R. F. DeMara. “Compact low-power instant store and restore D flip-flop using a selfcomplementing spintronic device.” Electronics Letters 52, no. 14 (July 7, 2016): 1238–40. https://doi.org/10.1049/el.2015.4114.

Chen, X., K. W. Nixon, and Y. Chen. “Practical power consumption analysis with current smartphones.” In International System on Chip Conference, 0:333–37, 2016. https://doi.org/10.1109/SOCC.2016.7905505.

Wen, W., C. Wu, Y. Wang, K. Nixon, Q. Wu, M. Barnell, H. Li, and Y. Chen. “A new learning method for inference accuracy, core occupation, and performance co-optimization on TrueNorth chip.” In Proceedings Design Automation Conference, Vol. 05-09-June-2016, 2016. https://doi.org/10.1145/2897937.2897968.

Chen, X., N. Khoshavi, J. Zhou, D. Huang, R. F. Demara, J. Wang, W. Wen, and Y. Chen. “AOS: Adaptive overwrite scheme for energy-efficient MLC STT-RAM cache.” In Proceedings Design Automation Conference, Vol. 05-09-June-2016, 2016. https://doi.org/10.1145/2897937.2897987.

Mao, M., W. Wen, X. Liu, J. Hu, D. Wang, Y. Chen, and H. Li. “TEMP: Thread batch enabled memory partitioning for GPU.” In Proceedings Design Automation Conference, Vol. 05-09-June-2016, 2016. https://doi.org/10.1145/2897937.2898103.

Eken, E., L. Song, I. Bayram, C. Xu, W. Wen, Y. Xie, and Y. Chen. “NVSim-VXs: An improved NVSim for variation aware STT-RAM simulation.” In Proceedings Design Automation Conference, Vol. 05-09-June-2016, 2016. https://doi.org/10.1145/2897937.2898053.

Chen, X., J. Mao, J. Gao, K. W. Nixon, and Y. Chen. “MORPh: Mobile OLED-friendly recording and playback system for low power video streaming.” In Proceedings Design Automation Conference, Vol. 05-09-June-2016, 2016. https://doi.org/10.1145/2897937.2898047.

Eken, E., I. Bayram, Y. Zhang, B. Yan, W. Wu, H. Li, and Y. Chen. “Spin-hall assisted STT-RAM design and discussion.” In Proceedings of the 18th ACM IEEE System Level Interconnect Prediction 2016 Workshop SLIP 2016, 2016. https://doi.org/10.1145/2947357.2947360.

Hu, M., Y. Wang, W. Wen, and H. Li. “Leveraging Stochastic Memristor Devices in Neuromorphic Hardware Systems.” IEEE Journal on Emerging and Selected Topics in Circuits and Systems 6, no. 2 (June 1, 2016): 235–46. https://doi.org/10.1109/JETCAS.2016.2547780.

Yang, J., Z. Sun, X. Wang, Y. Chen, and H. Li. “Spintronic Memristor as Interface between DNA and Solid State Devices.” IEEE Journal on Emerging and Selected Topics in Circuits and Systems 6, no. 2 (June 1, 2016): 212–21. https://doi.org/10.1109/JETCAS.2016.2547700.

Cline, B., H. H. Li, G. Qu, S. Mukhopadhyay, V. Viswanath, A. A. Iranmanesh, P. J. Wright, and P. Wesling. “WELCOME to ISQED 2016.” In Proceedings International Symposium on Quality Electronic Design Isqed, 2016-May:1, 2016. https://doi.org/10.1109/ISQED.2016.7479143.

Yang, C., B. Liu, Y. Wang, Y. Chen, H. Li, X. Zhang, and G. Sun. “The applications of NVM technology in hardware security.” In Proceedings of the ACM Great Lakes Symposium on VLSI Glsvlsi, 18-20-May-2016:311–16, 2016. https://doi.org/10.1145/2902961.2903043.