Publications

Found 547 results
[ Type(Desc)] Year
Conference Paper
X Chen, N Khoshavi, J Zhou, D Huang, RF DeMara, J Wang, W Wen, and Y Chen. "AOS: Adaptive overwrite scheme for energy-efficient MLC STT-RAM cache." In Proceedings Design Automation Conference. Vol. 05-09-June-2016. 2016.
C Wu, HP Cheng, S Li, HH Li, and Y Chen. "ApesNet: A pixel-wise efficient segmentation network." In Proceedings of the 14th Acm/Ieee Symposium on Embedded Systems for Real Time Multimedia, Estimedia 2016, 2-8. 2016.
Z Xie, X Xu, M Walker, J Knebel, K Palaniswamy, N Hebert, J Hu, H Yang, Y Chen, and S Das. "APOLLO: An automated power modeling framework for runtime power introspection in high-volume commercial microprocessors." In Proceedings of the Annual International Symposium on Microarchitecture, Micro, 1-14. 2021.
Y Chen, X Wang, Z Sun, and H Li. "The application of spintronic devices in magnetic bio-sensing." In Proceedings of the 2nd Asia Symposium on Quality Electronic Design, Asqed 2010, 230-234. 2010.
H Li, B Liu, X Liu, M Mao, Y Chen, Q Wu, and Q Qiu. "The applications of memristor devices in next-generation cortical processor designs." In Proceedings Ieee International Symposium on Circuits and Systems, 17-20. Vol. 2015-July. 2015.
C Yang, B Liu, Y Wang, Y Chen, H Li, X Zhang, and G Sun. "The applications of NVM technology in hardware security." In Proceedings of the Acm Great Lakes Symposium on Vlsi, Glsvlsi, 311-316. Vol. 18-20-May-2016. 2016.
Y Chen, H Li, X Wang, and J Park. "Applications of TMR devices in solid state circuits and systems." In 2010 International Soc Design Conference, Isocc 2010, 252-255. 2010.
B Zhao, J Yang, Y Zhang, Y Chen, and H Li. "Architecting a common-source-line array for bipolar non-volatile memory devices." In Proceedings Design, Automation and Test in Europe, Date, 1451-1454. 2012.
S Gu, EHM Sha, Q Zhuge, Y Chen, and J Hu. "Area and performance co-optimization for domain wall memory in application-specific embedded systems." In Proceedings Design Automation Conference. Vol. 2015-June. 2015.
Y Zhang, X Wang, Y Li, AK Jones, and Y Chen. "Asymmetry of MTJ switching and its implication to STT-RAM designs." In Proceedings Design, Automation and Test in Europe, Date, 1313-1318. 2012.
W Wen, F Yan, Y Chen, and H Li. "AutoGrow: Automatic Layer Growing in Deep Convolutional Networks." In Proceedings of the Acm Sigkdd International Conference on Knowledge Discovery and Data Mining, 833-841. 2020.
T Zhang, HP Cheng, Z Li, F Yan, C Huang, H Li, and Y Chen. "AutoShrink: A topology-aware NAS for discovering efficient neural architecture." In Aaai 2020 34th Aaai Conference on Artificial Intelligence, 6829-6836. 2020.
H Yang, J Zhang, HP Cheng, W Wang, Y Chen, and H Li. "Bamboo: Ball-shape data augmentation against adversarial attacks from all directions." In Ceur Workshop Proceedings. Vol. 2301. 2019.
L Chen, Z Liu, C Li, J Wu, J Chen, and Y Chen. "Behaviors of multi-dimensional forgetting memristor models." In Proceedings Iecon 2017 43rd Annual Conference of the Ieee Industrial Electronics Society, 7417-7421. Vol. 2017-January. 2017.
C Liu, F Liu, and H Li. "Beyond CMOS: Memristor and its application for next generation storage and computing." In Ecs Transactions, 115-125. Vol. 85. 2018.
Q Wu, B Liu, Y Chen, H Li, Q Chen, and Q Qiu. "Bio-inspired computing with resistive memories - Models, architectures and applications." In Proceedings Ieee International Symposium on Circuits and Systems, 834-837. 2014.
C Liu, F Liu, and H Li. "Brain-inspired computing accelerated by memristor technology." In Proceedings of the 4th Acm International Conference on Nanoscale Computing and Communication, Nanocom 2017. 2017.
M Hu, H Li, Y Chen, Q Wu, and GS Rose. "BSB training scheme implementation on memristor-based circuit." In Proceedings of the 2013 Ieee Symposium on Computational Intelligence for Security and Defense Applications, Cisda 2013 2013 Ieee Symposium Series on Computational Intelligence, Ssci 2013, 80-87. 2013.
B Li, C Liu, B Yan, and H Li. "Build reliable and efficient neuromorphic design with memristor technology." In Proceedings of the Asia and South Pacific Design Automation Conference, Asp Dac, 224-229. 2019.
S Chakraborty, S Joshi, Q Xia, H Li, Y Chen, H Jiang, Q Wu, M Barnell, and JJ Yang. "Built-in selectors self-assembled into memristors." In Proceedings Ieee International Symposium on Circuits and Systems, 181-184. Vol. 2016-July. 2016.
J Li, L Shi, Q Li, CJ Xue, Y Chen, and Y Xu. "Cache coherence enabled adaptive refresh for volatile STT-RAM." In Proceedings Design, Automation and Test in Europe, Date, 1247-1250. 2013.
Y Chen,, K Roy, and. "Cascaded carry-select adder (C/sup 2/SA): a new structure for low-power CSA design." In Islped '05. Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005., 115-118. 2005.
Y Chen, H Li, K Roy, and CK Koh. "Cascaded carry-select adder (C2 SA): A new structure for low-power CSA design." In Proceedings of the International Symposium on Low Power Electronics and Design, 115-118. 2005.
W Wen, M Mao, X Zhu, SH Kang, D Wang, and Y Chen. "CD-ECC: Content-dependent error correction codes for combating asymmetric nonvolatile memory operation errors." In Ieee/Acm International Conference on Computer Aided Design, Digest of Technical Papers, Iccad, 1-8. 2013.
M Xie, C Pan, J Hu, C Yang, and Y Chen. "Checkpoint-aware instruction scheduling for nonvolatile processor with multiple functional units." In 20th Asia and South Pacific Design Automation Conference, Asp Dac 2015, 316-321. 2015.

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