Shift-Optimized Energy-Efficient Racetrack-Based Main Memory

Recently developed spin-based, racetrack memory (RM) shows great promise in enabling nonvolatile memory with unprecedented density and energy efficiency. RM-based technology will leverage the power and cost limit of main memory. However, main memory has random accessing patterns and makes racetrack shifting overhead variable that induces an unstable latency. This paper analyzes the shifting features in view of computing architecture by exploring the design space of RM. We propose RM-based pre-shifting and direction optimized policies to reduce the shifting overhead and to achieve a DRAM comparable performance without additional energy and area overhead. Experiments with a wide range of SPEC2006 benchmarks show the proposed methodology outperforms RM-based main memory without pre-shifting by 12% in energy consumption. Compared to DRAM-based main memory of the same capacity, the proposed methodology improves the energy consumption by 53% on average.