Preface. Vol. 13070 LNAI., 2021.
Preface.. Vol. 46., 2019.
Preface. Vol. 10561 LNCS., 2017.
A 1.041-Mb/mm227.38-TOPS/W Signed-INT8 Dynamic-Logic-Based ADC-less SRAM Compute-in-Memory Macro in 28nm with Reconfigurable Bitwise Operation for AI and Embedded Applications." In Digest of Technical Papers Ieee International Solid State Circuits Conference, 188-190. Vol. 2022-February. 2022."
A 1.0V 45nm nonvolatile magnetic latch design and its robustness analysis." In Proceedings of the Custom Integrated Circuits Conference. 2011."
1S1R-based stable learning through single-spike-encoded spike-timing-dependent plasticity." In Proceedings Ieee International Symposium on Circuits and Systems. Vol. 2021-May. 2021."
3D-HIM: A 3D High-density interleaved memory for bipolar RRAM design." In Proceedings of the 2011 Ieee/Acm International Symposium on Nanoscale Architectures, Nanoarch 2011, 59-64. 2011."
3D-ICML: A 3D bipolar ReRAM design with interleaved complementary memory layers." In Proceedings Design, Automation and Test in Europe, Date, 583-586. 2011."
3M-PCM: Exploiting multiple write modes MLC phase change main memory in embedded systems." In 2014 International Conference on Hardware/Software Codesign and System Synthesis, Codes+Isss 2014. 2014."
The 5th Artificial Intelligence of Things (AIoT) Workshop." In Proceedings of the Acm Sigkdd International Conference on Knowledge Discovery and Data Mining, 4912-4913. 2022."
Accelerating CNN Training by Pruning Activation Gradients." In Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), 322-338. Vol. 12370 LNCS. 2020."
Accelerating graph computation with racetrack memory and pointer-assisted graph representation." In Proceedings Design, Automation and Test in Europe, Date. 2014."
Accelerator-friendly neural-network training: Learning variations and defects in RRAM crossbar." In Proceedings of the 2017 Design, Automation and Test in Europe, Date 2017, 19-24. 2017."
Access scheme of multi-level cell spin-transfer torque random access memory and its optimization." In 2007 50th Midwest Symposium on Circuits and Systems, 1109-1112. 2010."
AccPar: Tensor partitioning for heterogeneous deep learning accelerators." In Proceedings 2020 Ieee International Symposium on High Performance Computer Architecture, Hpca 2020, 342-355. 2020."
Active compensation technique for the thin-film transistor variations and OLED aging of mobile device displays." In Ieee/Acm International Conference on Computer Aided Design, Digest of Technical Papers, Iccad, 516-522. 2012."
AdaLearner: An adaptive distributed mobile learning system for neural networks." In Ieee/Acm International Conference on Computer Aided Design, Digest of Technical Papers, Iccad, 291-296. Vol. 2017-November. 2017."
ADAMS: Asymmetric differential STT-RAM cell structure for reliable and high-performance applications." In Ieee/Acm International Conference on Computer Aided Design, Digest of Technical Papers, Iccad, 9-16. 2013."
Adaptive granularity encoding for energy-efficient non-volatile main memory." In Proceedings Design Automation Conference. 2019."
Adaptive refreshing and read voltage control scheme for FeDRAM." In Proceedings Ieee International Symposium on Circuits and Systems, 1154-1157. Vol. 2016-July. 2016."
An adjustable memristor model and its application in small-world neural networks." In Proceedings of the International Joint Conference on Neural Networks, 7-14. 2014."
Advanced techniques for robust SAR ATR: Mitigating noise and phase errors." In 2020 Ieee International Radar Conference, Radar 2020, 844-849. 2020."
AdverQuil: An efficient adversarial detection and alleviation technique for black-box neuromorphic computing systems." In Proceedings of the Asia and South Pacific Design Automation Conference, Asp Dac, 557-562. 2019."