Publications

Found 600 results
Type [ Year(Asc)]
2010
D Niu, Y Chen, C Xu, and Y Xie. "Impact of process variations on emerging memristor." In Proceedings Design Automation Conference, 877-882. 2010.
D Niu, Y Chen, and Y Xie. "Low-power dual-element memristor based memory design." In Proceedings of the International Symposium on Low Power Electronics and Design, 25-30. 2010.
Y Chen, HH Li, X Wang, W Zhu, W Xu, T Zhang, and. "Nondestructive Self-Reference Scheme for Spin-Transfer Torque Random Access Memory (STT-RAM)." In Design, Automation and Test in Europe Conference and Exhibition , IEEE, 148-153. 2010.
Y Chen, H Li, X Wang, W Zhu, W Xu, and T Zhang. "A nondestructive self-reference scheme for spin-transfer torque random access memory (STT-RAM)." In Proceedings Design, Automation and Test in Europe, Date, 148-153. 2010.
Y Chen, and H Li. "Patents relevant to cross-point memory array." Recent Patents on Electrical Engineeringe 3, no. 2 (2010): 114-124.
X Wang, and Y Chen. "Patents relevant to spintronic memristor." Recent Patents on Electrical Engineeringe 3, no. 1 (2010): 10-18.
Y Chen, W Tian, H Li, X Wang, and W Zhu. "PCMO device with high switching stability." Ieee Electron Device Letters 31, no. 8 (2010): 866-868.
Y Chen, W Tian, H Li, X Wang, and W Zhu. "Scalability of PCMO-based resistive switch device in DSM technologies." In Proceedings of the 11th International Symposium on Quality Electronic Design, Isqed 2010, 327-332. 2010.
H Xi, J Stricklin, H Li, Y Chen, X Wang, Y Zheng, Z Gao, and MX Tang. "Spin transfer torque memory with thermal assist mechanism: A case study." Ieee Transactions on Magnetics 46, no. 3 PART 2 (2010): 860-865.
Y Chen, H Li, and X Wang. "Spintronic devices: From memory to memristor." In 2010 International Conference on Communications, Circuits and Systems, Icccas 2010 Proceedings, 811-816. 2010.
X Wang, and Y Chen. "Spintronic memristor devices and application." In Proceedings Design, Automation and Test in Europe, Date, 667-672. 2010.
X Wang, Y Chen, Y Gu, and H Li. "Spintronic memristor temperature sensor." Ieee Electron Device Letters 31, no. 1 (2010): 20-22.
Y Chen, H Li, CK Koh, J Li, K Roy, G Sun, and Y Xie. "Variable-Latency Adder (VL-Adder) Designs for Low Power and NBTI Tolerance." Ieee Transactions on Very Large Scale Integration (Vlsi) Systems 18, no. 11 (2010): 1621-1624.
Z Sun, H Li, Y Chen, and X Wang. "Variation tolerant sensing scheme of spin-transfer torque memory for yield improvement." In Ieee/Acm International Conference on Computer Aided Design, Digest of Technical Papers, Iccad, 432-437. 2010.
2009
Y Chen, and X Wang. "Compact modeling and corner analysis of spintronic memristor." In 2009 Ieee/Acm International Symposium on Nanoscale Architectures, Nanoarch 2009, 7-12. 2009.
Y Chen, H Li, K Roy, and CK Koh. "Gated decap: Gate leakage control of on-chip decoupling capacitors in scaled technologies." Ieee Transactions on Very Large Scale Integration (Vlsi) Systems 17, no. 12 (2009): 1749-1752.
W Xu, Y Chen, X Wang, and T Zhang. "Improving STT MRAM storage density through smaller-than-worst-case transistor sizing." In Proceedings Design Automation Conference, 87-90. 2009.
G Sun, X Dong, Y Xie, J Li, and Y Chen. "A novel architecture of the 3D stacked MRAM L2 Cache for CMPs." In Proceedings International Symposium on High Performance Computer Architecture, 239-249. 2009.
H Xi, X Wang, Y Chen, and PJ Ryan. "Ordering of magnetic nanoparticles in bilayer structures." Journal of Physics D: Applied Physics 42, no. 1 (2009): 015006.
L Hai, and C Yiran. "An overview of non-volatile memory technology and the implication for tools and architectures." In Proceedings Design, Automation and Test in Europe, Date, 731-736. 2009.
CK Koh, WF Wong, Y Chen, and H Li. "The salvage cache: A fault-tolerant cache architecture for next-generation memory technologies." In Proceedings Ieee International Conference on Computer Design: Vlsi in Computers and Processors, 268-274. 2009.
X Wang, Y Chen, H Xi, H Li, and D Dimitrov. "Spintronic memristor through spin-thorque-induced magnetization motion." Ieee Electron Device Letters 30, no. 3 (2009): 294-297.
H Li, H Xi, Y Chen, J Stricklin, X Wang, and T Zhang. "Thermal-assisted spin transfer torque memory (STT-RAM) cell design exploration." In Proceedings of the 2009 Ieee Computer Society Annual Symposium on Vlsi, Isvlsi 2009, 217-222. 2009.
CK Koh, WF Wong, Y Chen, and H Li. "Tolerating process variations in large, set-associative caches: The buddy cache." Acm Transactions on Architecture and Code Optimization 6, no. 2 (2009): 1-34.
2008
X Dong, X Wu, G Sun, Y Xie, H Li, and Y Chen. "Circuit and microarchitecture evaluation of 3D stacking magnetic RAM (MRAM) as a universal memory replacement." In Proceedings Design Automation Conference, 554-559. 2008.

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