Publications

Found 600 results
Type [ Year(Asc)]
2011
CJ Xue, Y Zhang, Y Chen, G Sun, JJ Yang, and H Li. "Emerging non-volatile memories: Opportunities and challenges." In Embedded Systems Week 2011, Esweek 2011 Proceedings of the 9th Ieee/Acm/Ifip International Conference on Hardware/Software Codesign and System Synthesis, Codes+Isss'11, 325-334. 2011.
Y Chen, and H Li. "Emerging sensing techniques for emerging memories." In Proceedings of the Asia and South Pacific Design Automation Conference, Asp Dac, 204-210. 2011.
M Hu, H Li, and RE Pino. "Fast statistical model of TiO 2 thin-film memristor and design implication." In Ieee/Acm International Conference on Computer Aided Design, Digest of Technical Papers, Iccad, 345-352. 2011.
M Hu, H Li, Y Chen, X Wang, and RE Pino. "Geometry variations analysis of TiO2 thin-film and spintronic memristors." In Proceedings of the Asia and South Pacific Design Automation Conference, Asp Dac, 25-30. 2011.
P Zhou, B Zhao, Y Zhang, J Yang, and Y Chen. "MRAC: A memristor-based reconfigurable framework for adaptive cache replacement." In Parallel Architectures and Compilation Techniques Conference Proceedings, Pact, 207-208. 2011.
Z Sun, X Bi, H Li, WF Wong, ZL Ong, X Zhu, and W Wu. "Multi retention level STT-RAM cache designs with a dynamic refresh scheme." In Proceedings of the Annual International Symposium on Microarchitecture, Micro, 329-338. 2011.
P Wang, X Wang, Y Zhang, H Li, SP Levitan, and Y Chen. "Nonpersistent errors optimization in spin-MOS logic and storage circuitry." Ieee Transactions on Magnetics 47, no. 10 (2011): 3860-3863.
H Li, and Y Chen. Nonvolatile Memory Design Magnetic, Resistive, and Phase Change., 2011.
H Li, X Wang, ZL Ong, WF Wong, Y Zhang, P Wang, and Y Chen. "Performance, power, and reliability tradeoffs of STT-RAM cell subject to architecture-level requirement." Ieee Transactions on Magnetics 47, no. 10 (2011): 2356-2359.
Y Chen, WF Wong, H Li, and CK Koh. "Processor caches built using multi-level spin-transfer torque RAM cells." In Proceedings of the International Symposium on Low Power Electronics and Design, 73-78. 2011.
M Hu, HH Li, Y Chen, and X Wang. "Spintronic memristor: Compact model and statistical analysis." Journal of Low Power Electronics 7, no. 2 (2011): 234-244.
X Dong, X Wu, Y Xie, Y Chen, and H Li. "Stacking magnetic random access memory atop microprocessors: An architecture-level evaluation." Iet Computers & Digital Techniques 5, no. 3 (2011): 213-220.
Y Zhang, X Wang, and Y Chen. "STT-RAM cell design optimization for persistent and non-persistent error rate reduction: A statistical design view." In Ieee/Acm International Conference on Computer Aided Design, Digest of Technical Papers, Iccad, 471-477. 2011.
Y Zhang, X Wang, H Li, and Y Chen. "STT-RAM cell optimization considering MTJ and CMOS variations." Ieee Transactions on Magnetics 47, no. 10 (2011): 2962-2965.
R Joshi, R Kanj, P Wang, and HH Li. "Universal statistical cure for predicting memory loss." In Ieee/Acm International Conference on Computer Aided Design, Digest of Technical Papers, Iccad, 236-239. 2011.
R Joshi, R Kanj, P Wang, and HH Li. "Universal Statistical Cure For Predicting Memory Loss (Invited Paper)." In 2012 Ieee/Acm International Conference on Computer Aided Design (Iccad), 236-239. 2011.
2010
Y Chen, X Wang, W Zhu, H Li, Z Sun, G Sun, and Y Xie. "Access scheme of multi-level cell spin-transfer torque random access memory and its optimization." In 2007 50th Midwest Symposium on Circuits and Systems, 1109-1112. 2010.
Y Chen, X Wang, Z Sun, and H Li. "The application of spintronic devices in magnetic bio-sensing." In Proceedings of the 2nd Asia Symposium on Quality Electronic Design, Asqed 2010, 230-234. 2010.
Y Chen, H Li, X Wang, and J Park. "Applications of TMR devices in solid state circuits and systems." In 2010 International Soc Design Conference, Isocc 2010, 252-255. 2010.
Y Chen, H Li, X Wang, W Zhu, W Xu, and T Zhang. "Combined magnetic-and circuit-level enhancements for the nondestructive self-reference scheme of STT-RAM." In Proceedings of the International Symposium on Low Power Electronics and Design, 1-6. 2010.
H Li, and M Hu. "Compact model of memristors and its application in computing systems." In Proceedings Design, Automation and Test in Europe, Date, 673-678. 2010.
Y Chen, X Wang, H Li, H Xi, Y Yan, and W Zhu. "Design margin exploration of spin-transfer torque RAM (STT-RAM) in scaled technologies." Ieee Transactions on Very Large Scale Integration (Vlsi) Systems 18, no. 12 (2010): 1724-1734.
W Xu, T Zhang, and Y Chen. "Design of spin-torque transfer magnetoresistive RAM and CAM/TCAM with high sensing and search Speed." Ieee Transactions on Very Large Scale Integration (Vlsi) Systems 18, no. 1 (2010): 66-74.
H Li, and Y Chen. "Emerging non-volatile memory technologies: From materials, to device, circuit, and architecture." In 2007 50th Midwest Symposium on Circuits and Systems, 1-4. 2010.
G Sun, Y Joo, Y Chen, D Niu, Y Xie, and H Li. "A hybrid solid-state storage architecture for the performance, energy consumption, and lifetime improvement." In Proceedings International Symposium on High Performance Computer Architecture. 2010.

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