Publications

Found 600 results
[ Type(Asc)] Year
Journal Article
S Li, N Xiao, P Wang, G Sun, X Wang, Y Chen, H Li, J Cong, and T Zhang. "RC-NVM: Dual-Addressing Non-Volatile Memory Architecture Supporting Both Row and Column Memory Accesses." Ieee Transactions on Computers 68, no. 2 (2019): 239-254.
J Yang, P Wang, Y Zhang, Y Cheng, W Zhao, Y Chen, and HH Li. "Radiation-induced soft error analysis of STT-MRAM: A device to circuit approach." Ieee Transactions on Computer Aided Design of Integrated Circuits and Systems 35, no. 3 (2016): 380-393.
B Sun, S Wen, S Wang, T Huang, Y Chen, and P Li. "Quantized synchronization of memristive neural networks with time-varying delays via super-twisting algorithm." Neurocomputing 380 (2020): 133-140.
W Wen, Y Zhang, Y Chen, Y Wang, and Y Xie. "PS3-RAM: A fast portable and scalable statistical STT-RAM reliability/energy analysis method." Ieee Transactions on Computer Aided Design of Integrated Circuits and Systems 33, no. 11 (2014): 1644-1656.
Y Zhang, W Wen, and Y Chen. "The prospect of STT-RAM scaling from readability perspective." Ieee Transactions on Magnetics 48, no. 11 (2012): 3035-3038.
S Wang, Y CAO, S Wen, Z Guo, T Huang, and Y Chen. "Projective Synchroniztion of Neural Networks via Continuous/Periodic Event-Based Sampling Algorithms." Ieee Transactions on Network Science and Engineering 7, no. 4 (2020): 2746-2754.
B Taylor, Q Zheng, Z Li, S Li, and Y Chen. "Processing-in-Memory Technology for Machine Learning: From Basic to ASIC." Ieee Transactions on Circuits and Systems Ii: Express Briefs 69, no. 6 (2022): 2598-2603.
Z Xie, R Liang, X Xu, J Hu, CC Chang, J Pan, and Y Chen. "Pre-Placement Net Length and Timing Estimation by Customized Graph Neural Network." Ieee Transactions on Computer Aided Design of Integrated Circuits and Systems (2022).
Q Zheng, X Li, Y Guan, Z Wang, Y Cai, Y Chen, G Sun, and R Huang. "PIMulator-NN: an Event-Driven, Cross-level Simulation Framework for Processing-In-Memory based Neural Network Accelerators." Ieee Transactions on Computer Aided Design of Integrated Circuits and Systems (2022).
L Chen, C Li, T Huang, HG Ahmad, and Y Chen. "A phenomenological memristor model for short-term/long-term memory." Physics Letters A 378, no. 40 (2014): 2924-2930.
Y Zhang, B Yan, X Wang, and Y Chen. "Persistent and Nonpersistent Error Optimization for STT-RAM Cell Design." Ieee Transactions on Computer Aided Design of Integrated Circuits and Systems 36, no. 7 (2017): 1181-1192.
H Li, X Wang, ZL Ong, WF Wong, Y Zhang, P Wang, and Y Chen. "Performance, power, and reliability tradeoffs of STT-RAM cell subject to architecture-level requirement." Ieee Transactions on Magnetics 47, no. 10 (2011): 2356-2359.
Y Chen, W Tian, H Li, X Wang, and W Zhu. "PCMO device with high switching stability." Ieee Electron Device Letters 31, no. 8 (2010): 866-868.
X Wang, and Y Chen. "Patents relevant to spintronic memristor." Recent Patents on Electrical Engineeringe 3, no. 1 (2010): 10-18.
Y Chen, and H Li. "Patents relevant to cross-point memory array." Recent Patents on Electrical Engineeringe 3, no. 2 (2010): 114-124.
S Wen, Z Zeng, T Huang, and Y Chen. "Passivity analysis of memristor-based recurrent neural networks with time-varying delays." Journal of the Franklin Institute 350, no. 8 (2013): 2354-2370.
W Hu, CH Chang, A Sengupta, S Bhunia, R Kastner, and H Li. "An Overview of Hardware Security and Trust: Threats, Countermeasures, and Design Tools." Ieee Transactions on Computer Aided Design of Integrated Circuits and Systems 40, no. 6 (2021): 1010-1038.
H Xi, X Wang, Y Chen, and PJ Ryan. "Ordering of magnetic nanoparticles in bilayer structures." Journal of Physics D: Applied Physics 42, no. 1 (2009): 015006.
Y Chen, WF Wong, H Li, CK Koh, Y Zhang, and W Wen. "On-chip caches built on multilevel spin-transfer torque RAM cells and its optimizations." Acm Journal on Emerging Technologies in Computing Systems 9, no. 2 (2013): 1-22.
I Bayram, and Y Chen. "NV-TCAM: Alternative designs with NVM devices." Integration, the Vlsi Journal 62 (2018): 114-122.
E Eken, Y Zhang, W Wen, R Joshi, H Li, and Y Chen. "A novel self-reference technique for STT-RAM read and write reliability enhancement." Ieee Transactions on Magnetics 50, no. 11 (2014): 1-4.
Z Dong, S Duan, X Hu, L Wang, and H Li. "A novel memristive multilayer feedforward small-world neural network with its applications in PID control." Thescientificworldjournal 2014 (2014).
X Chai, Z Gan, K Yuan, Y Chen, and X Liu. "A novel image encryption scheme based on DNA sequence operations and chaotic systems." Neural Computing and Applications 31, no. 1 (2019): 219-237.
X Chai, Z Gan, Y Lu, Y Chen, and D Han. "A novel image encryption algorithm based on the chaotic system and DNA computing." International Journal of Modern Physics C 28, no. 05 (2017): 1-24.
XL Chai, ZH Gan, Y Lu, MH Zhang, and YR Chen. "A novel color image encryption algorithm based on genetic recombination and the four-dimensional memristive hyperchaotic system." Chinese Physics B 25, no. 10 (2016): 100503.

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