Publications

Found 617 results
Type [ Year(Asc)]
2015
L Zhang, N Ge, Joshua J Yang, Z Li, Stanley R Williams, and Y Chen. "Low voltage two-state-variable memristor model of vacancy-drift resistive switches." Applied Physics A: Materials Science and Processing 119, no. 1 (2015): 1-9.
L Chen, C Li, T Huang, S Wen, and Y Chen. "Memristor crossbar array for image storing." In Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), 166-173. Vol. 9377 LNCS. 2015.
DH Wang, HP Liu, and YR Chen. "Multi-bit soft error tolerable L1 data cache based on characteristic of data value." Journal of Central South University 22, no. 5 (2015): 1769-1775.
H Li, X Liu, M Mao, Y Chen, Q Wu, and M Barnell. "Neuromorphic hardware acceleration enabled by emerging technologies (Invited paper)." In Proceedings of the 14th International Symposium on Integrated Circuits, Isic 2014, 124-127. 2015.
Z Li, B Yan, L Yang, W Zhao, Y Chen, and H Li. "A new self-reference sensing scheme for TLC MRAM." In Proceedings Ieee International Symposium on Circuits and Systems, 593-596. Vol. 2015-July. 2015.
Y Wang, W Wen, M Hu, and H Li. "A novel true random number generator design leveraging emerging memristor technology." In Proceedings of the Acm Great Lakes Symposium on Vlsi, Glsvlsi, 271-276. Vol. 20-22-May-2015. 2015.
Z Li, C Liu, Y Wang, B Yan, C Yang, J Yang, and H Li. "An overview on memristor crossabr based neuromorphic circuit and architecture." In Ieee/Ifip International Conference on Vlsi and System on Chip, Vlsi Soc, 52-56. Vol. 2015-October. 2015.
C Zhang, G Sun, W Zhang, F Mi, H Li, and W Zhao. "Quantitative modeling of racetrack memory, a tradeoff among area, performance, and power." In 20th Asia and South Pacific Design Automation Conference, Asp Dac 2015, 100-105. 2015.
Y Zhang, Y Li, Z Sun, H Li, Y Chen, and AK Jones. "Read performance: The newest barrier in scaled stt-ram." Ieee Transactions on Very Large Scale Integration (Vlsi) Systems 23, no. 6 (2015): 1170-1174.
B Liu, Y Chen, B Wysocki, and T Huang. "Reconfigurable Neuromorphic Computing System with Memristor-Based Synapse Design." Neural Processing Letters 41, no. 2 (2015): 159-167.
B Liu, H Li, Y Chen, X Li, T Huang, Q Wu, and M Barnell. "Reduction and IR-drop compensations techniques for reliable neuromorphic computing systems." In Ieee/Acm International Conference on Computer Aided Design, Digest of Technical Papers, Iccad, 63-70. Vol. 2015-January. 2015.
X Liu, M Mao, B Liu, H Li, Y Chen, B Li, Y Wang, H Jiang, M Barnell, Q Wu et al. "RENO: A high-efficient reconfigurable neuromorphic computing accelerator design." In Proceedings Design Automation Conference. Vol. 2015-July. 2015.
B Li, P Gu, Y Shan, Y Wang, Y Chen, and H Yang. "RRAM-Based Analog Approximate Computing." Ieee Transactions on Computer Aided Design of Integrated Circuits and Systems 34, no. 12 (2015): 1905-1917.
T Tang, L Xia, B Li, R Luo, Y Chen, Y Wang, and H Yang. "Spiking neural network with RRAM: Can we use it for real-world application?" In Proceedings Design, Automation and Test in Europe, Date, 860-865. Vol. 2015-April. 2015.
C Liu, B Yan, C Yang, L Song, Z Li, B Liu, Y Chen, H Li, Q Wu, and H Jiang. "A spiking neuromorphic design with resistive crossbar." In Proceedings Design Automation Conference. Vol. 2015-July. 2015.
HH Li, C Liu, B Yan, C Yang, L Song, Z Li, Y Chen, W Zhu, Q Wu, and H Jiang. "Spiking-based matrix computation by leveraging memristor crossbar array." In 2015 Ieee Symposium on Computational Intelligence for Security and Defense Applications, Cisda 2015 Proceedings, 43-46. 2015.
E Eken, Y Zhang, B Yan, W Wu, H Li, and Y Chen. "Spin-hall assisted STT-RAM design and discussion." In 2015 Ieee International Magnetics Conference, Intermag 2015. 2015.
B Liu, H Li, Y Chen, X Li, Q Wu, and T Huang. "Vortex: Variation-aware training for memristor X-bar." In Proceedings Design Automation Conference. Vol. 2015-July. 2015.
M Mao, J Hu, Y Chen, and H Li. "VWS: A versatile warp scheduler for exploring diverse cache localities of GPGPU applications." In Proceedings Design Automation Conference. Vol. 2015-July. 2015.
PJ Wright, A Raychowdhury, B Liu, S Mukhopadhyay, HH Li, AA Iranmanesh, SM Alam, and P Wesling. "Welcome to ISQED 2015." In Proceedings International Symposium on Quality Electronic Design, Isqed. Vol. 2015-April. 2015.
2014
C Pan, M Xie, J Hu, Y Chen, and C Yang. "3M-PCM: Exploiting multiple write modes MLC phase change main memory in embedded systems." In 2014 International Conference on Hardware/Software Codesign and System Synthesis, Codes+Isss 2014. 2014.
E Park, S Yoo, S Lee, and H Li. "Accelerating graph computation with racetrack memory and pointer-assisted graph representation." In Proceedings Design, Automation and Test in Europe, Date. 2014.
X Hu, G Feng, H Li, Y Chen, and S Duan. "An adjustable memristor model and its application in small-world neural networks." In Proceedings of the International Joint Conference on Neural Networks, 7-14. 2014.
Q Wu, B Liu, Y Chen, H Li, Q Chen, and Q Qiu. "Bio-inspired computing with resistive memories - Models, architectures and applications." In Proceedings Ieee International Symposium on Circuits and Systems, 834-837. 2014.
J Wang, Y Tim, WF Wong, ZL Ong, Z Sun, and HH Li. "A coherent hybrid SRAM and STT-RAM L1 cache architecture for shared memory multicores." In Proceedings of the Asia and South Pacific Design Automation Conference, Asp Dac, 610-615. 2014.

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