Publications

2019

Ardi, M., A. C. Berg, B. Chen, Y. K. Chen, Y. Chen, D. Kang, J. Lee, et al. “Special Session: 2018 Low-Power Image Recognition Challenge and beyond.” In Proceedings 2019 IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2019, 154–57, 2019. https://doi.org/10.1109/AICAS.2019.8771606.

Li, S., N. Xiao, P. Wang, G. Sun, X. Wang, Y. Chen, H. Li, J. Cong, and T. Zhang. “RC-NVM: Dual-Addressing Non-Volatile Memory Architecture Supporting Both Row and Column Memory Accesses.” IEEE Transactions on Computers 68, no. 2 (February 1, 2019): 239–54. https://doi.org/10.1109/TC.2018.2868368.

Chai, X., X. Fu, Z. Gan, Y. Lu, and Y. Chen. “A color image cryptosystem based on dynamic DNA encryption and chaos.” Signal Processing 155 (February 1, 2019): 44–62. https://doi.org/10.1016/j.sigpro.2018.09.029.

Cheng, H. P., Q. Wu, J. Shen, H. Li, H. Yang, and Y. Chen. “AdverQuil: An efficient adversarial detection and alleviation technique for black-box neuromorphic computing systems.” In Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, 557–62, 2019. https://doi.org/10.1145/3287624.3288753.

Min, C., J. Mao, H. Li, and Y. Chen. “NeuralHMC: An efficient HMC-based accelerator for deep neural networks.” In Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, 432–37, 2019. https://doi.org/10.1145/3287624.3287642.

Li, B., C. Liu, B. Yan, and H. Li. “Build reliable and efficient neuromorphic design with memristor technology.” In Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, 224–29, 2019. https://doi.org/10.1145/3287624.3288744.

Chai, X., Z. Gan, K. Yuan, Y. Chen, and X. Liu. “A novel image encryption scheme based on DNA sequence operations and chaotic systems.” Neural Computing and Applications 31, no. 1 (January 18, 2019): 219–37. https://doi.org/10.1007/s00521-017-2993-9.

Yang, J., X. Wang, Q. Zhou, Z. Wang, H. Li, Y. Chen, and W. Zhao. “Exploiting spin-orbit torque devices as reconfigurable logic for circuit obfuscation.” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 38, no. 1 (January 1, 2019): 57–69. https://doi.org/10.1109/TCAD.2018.2802870.

Zheng, Q., J. Kang, Z. Wang, Y. Cai, R. Huang, B. Li, Y. Chen, and H. Li. “Enhance the robustness to time dependent variability of ReRAM-based neuromorphic computing systems with regularization and 2R synapse.” In Proceedings - IEEE International Symposium on Circuits and Systems, Vol. 2019-May, 2019. https://doi.org/10.1109/ISCAS.2019.8702756.

Zhou, Y., X. Hu, L. Wang, S. Duan, and Y. Chen. “Markov Chain Based Efficient Defense Against Adversarial Examples in Computer Vision.” IEEE Access 7 (January 1, 2019): 5695–5706. https://doi.org/10.1109/ACCESS.2018.2889409.

Cheng, H. P., P. Yu, H. Hu, S. Zawad, F. Yan, S. Li, H. Li, and Y. Chen. “Towards decentralized deep learning with differential privacy.” In Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), 11513 LNCS:130–45, 2019. https://doi.org/10.1007/978-3-030-23502-4_10.

Yang, H., J. Zhang, H. P. Cheng, W. Wang, Y. Chen, and H. Li. “Bamboo: Ball-shape data augmentation against adversarial attacks from all directions.” In CEUR Workshop Proceedings, Vol. 2301, 2019.

Park, J., H. Li, S. Li, W. Wen, Y. Chen, P. T. P. Tang, and P. Dubey. “Faster cnns with direct sparse convolutions and guided pruning.” In 5th International Conference on Learning Representations, ICLR 2017 - Conference Track Proceedings, 2019.

Liu, X., H. Yang, Z. Liu, L. Song, H. Li, and Y. Chen. “DPatch: An adversarial patch attack on object detectors.” In CEUR Workshop Proceedings, Vol. 2301, 2019.

Qiao, X., Y. Yang, and H. Li. “Defending neural backdoors via generative distribution modeling.” In Advances in Neural Information Processing Systems, Vol. 32, 2019.

Chen, Y. “Reshaping Future Computing Systems with Emerging Nonvolatile Memory Technologies.” IEEE Micro 39, no. 1 (January 1, 2019): 54–57. https://doi.org/10.1109/MM.2018.2885588.

Hassan, A. M., C. Liu, C. Yang, H. Helen Li, and Y. Chen. “Designing neuromorphic computing systems with memristor devices.” In Handbook of Memristor Networks, 469–94, 2019. https://doi.org/10.1007/978-3-319-76375-0_16.

Yang, C., X. Qiao, and Y. Chen. “Neuromorphic computing systems: From CMOS to emerging nonvolatile memory.” IPSJ Transactions on System LSI Design Methodology 12 (January 1, 2019): 53–64. https://doi.org/10.2197/IPSJTSLDM.12.53.

2018

Chang, N., M. A. Faruque, Z. Shao, C. J. Xue, Y. Chen, and D. Baek. “Survey of low-power electric vehicles: A design automation perspective.” IEEE Design and Test 35, no. 6 (December 1, 2018): 44–70. https://doi.org/10.1109/MDAT.2018.2873475.

Fu, W., J. Yang, P. Dai, Y. Chen, and W. Zhao. “A Scalable Pipelined Dataflow Accelerator for Object Region Proposals on FPGA Platform.” In Proceedings - 2018 International Conference on Field-Programmable Technology, FPT 2018, 349–52, 2018. https://doi.org/10.1109/FPT.2018.00070.

Xie, Z., Y. H. Huang, G. Q. Fang, H. Ren, S. Y. Fang, Y. Chen, and J. Hu. “RouteNet: Routability prediction for mixed-size designs using convolutional neural network.” In IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD, 2018. https://doi.org/10.1145/3240765.3240843.

Nixon, K. W., J. Mao, J. Shen, H. Yang, H. H. Li, and Y. Chen. “SPN dash: Fast detection of adversarial attacks on mobile via sensor pattern noise fingerprinting.” In IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD, 2018. https://doi.org/10.1145/3240765.3240851.

Chen, F., and H. Li. “EMAT: An Efficient Multi-Task Architecture for Transfer Learning using ReRAM.” In IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD, 2018. https://doi.org/10.1145/3240765.3240805.

James, A. P., K. N. Salama, H. Li, D. Biolek, G. Indiveri, and L. O. Chua. “Guest Editorial: Special Issue on Large-Scale Memristive Systems and Neurochips for Computational Intelligence.” IEEE Transactions on Emerging Topics in Computational Intelligence 2, no. 5 (October 1, 2018): 320–23. https://doi.org/10.1109/TETCI.2018.2867375.

Liu, Z., M. Mao, T. Liu, X. Wang, W. Wen, Y. Chen, H. Li, D. Wang, Y. Pei, and N. Ge. “TriZone: A Design of MLC STT-RAM Cache for Combined Performance, Energy, and Reliability Optimizations.” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 37, no. 10 (October 1, 2018): 1985–98. https://doi.org/10.1109/TCAD.2017.2783860.