Publications

Found 600 results
Type [ Year(Desc)]
2008
W Xu, T Zhang, and Y Chen. "Spin-transfer torque magnetoresistive content addressable memory (CAM) cell structure design with enhanced search noise margin." In Proceedings Ieee International Symposium on Circuits and Systems, 1898-1901. 2008.
2009
Y Chen, and X Wang. "Compact modeling and corner analysis of spintronic memristor." In 2009 Ieee/Acm International Symposium on Nanoscale Architectures, Nanoarch 2009, 7-12. 2009.
Y Chen, H Li, K Roy, and CK Koh. "Gated decap: Gate leakage control of on-chip decoupling capacitors in scaled technologies." Ieee Transactions on Very Large Scale Integration (Vlsi) Systems 17, no. 12 (2009): 1749-1752.
W Xu, Y Chen, X Wang, and T Zhang. "Improving STT MRAM storage density through smaller-than-worst-case transistor sizing." In Proceedings Design Automation Conference, 87-90. 2009.
G Sun, X Dong, Y Xie, J Li, and Y Chen. "A novel architecture of the 3D stacked MRAM L2 Cache for CMPs." In Proceedings International Symposium on High Performance Computer Architecture, 239-249. 2009.
H Xi, X Wang, Y Chen, and PJ Ryan. "Ordering of magnetic nanoparticles in bilayer structures." Journal of Physics D: Applied Physics 42, no. 1 (2009): 015006.
L Hai, and C Yiran. "An overview of non-volatile memory technology and the implication for tools and architectures." In Proceedings Design, Automation and Test in Europe, Date, 731-736. 2009.
CK Koh, WF Wong, Y Chen, and H Li. "The salvage cache: A fault-tolerant cache architecture for next-generation memory technologies." In Proceedings Ieee International Conference on Computer Design: Vlsi in Computers and Processors, 268-274. 2009.
X Wang, Y Chen, H Xi, H Li, and D Dimitrov. "Spintronic memristor through spin-thorque-induced magnetization motion." Ieee Electron Device Letters 30, no. 3 (2009): 294-297.
H Li, H Xi, Y Chen, J Stricklin, X Wang, and T Zhang. "Thermal-assisted spin transfer torque memory (STT-RAM) cell design exploration." In Proceedings of the 2009 Ieee Computer Society Annual Symposium on Vlsi, Isvlsi 2009, 217-222. 2009.
CK Koh, WF Wong, Y Chen, and H Li. "Tolerating process variations in large, set-associative caches: The buddy cache." Acm Transactions on Architecture and Code Optimization 6, no. 2 (2009): 1-34.
2010
Y Chen, X Wang, W Zhu, H Li, Z Sun, G Sun, and Y Xie. "Access scheme of multi-level cell spin-transfer torque random access memory and its optimization." In 2007 50th Midwest Symposium on Circuits and Systems, 1109-1112. 2010.
Y Chen, X Wang, Z Sun, and H Li. "The application of spintronic devices in magnetic bio-sensing." In Proceedings of the 2nd Asia Symposium on Quality Electronic Design, Asqed 2010, 230-234. 2010.
Y Chen, H Li, X Wang, and J Park. "Applications of TMR devices in solid state circuits and systems." In 2010 International Soc Design Conference, Isocc 2010, 252-255. 2010.
Y Chen, H Li, X Wang, W Zhu, W Xu, and T Zhang. "Combined magnetic-and circuit-level enhancements for the nondestructive self-reference scheme of STT-RAM." In Proceedings of the International Symposium on Low Power Electronics and Design, 1-6. 2010.
H Li, and M Hu. "Compact model of memristors and its application in computing systems." In Proceedings Design, Automation and Test in Europe, Date, 673-678. 2010.
Y Chen, X Wang, H Li, H Xi, Y Yan, and W Zhu. "Design margin exploration of spin-transfer torque RAM (STT-RAM) in scaled technologies." Ieee Transactions on Very Large Scale Integration (Vlsi) Systems 18, no. 12 (2010): 1724-1734.
W Xu, T Zhang, and Y Chen. "Design of spin-torque transfer magnetoresistive RAM and CAM/TCAM with high sensing and search Speed." Ieee Transactions on Very Large Scale Integration (Vlsi) Systems 18, no. 1 (2010): 66-74.
H Li, and Y Chen. "Emerging non-volatile memory technologies: From materials, to device, circuit, and architecture." In 2007 50th Midwest Symposium on Circuits and Systems, 1-4. 2010.
G Sun, Y Joo, Y Chen, D Niu, Y Xie, and H Li. "A hybrid solid-state storage architecture for the performance, energy consumption, and lifetime improvement." In Proceedings International Symposium on High Performance Computer Architecture. 2010.
D Niu, Y Chen, C Xu, and Y Xie. "Impact of process variations on emerging memristor." In Proceedings Design Automation Conference, 877-882. 2010.
D Niu, Y Chen, and Y Xie. "Low-power dual-element memristor based memory design." In Proceedings of the International Symposium on Low Power Electronics and Design, 25-30. 2010.
Y Chen, HH Li, X Wang, W Zhu, W Xu, T Zhang, and. "Nondestructive Self-Reference Scheme for Spin-Transfer Torque Random Access Memory (STT-RAM)." In Design, Automation and Test in Europe Conference and Exhibition , IEEE, 148-153. 2010.
Y Chen, H Li, X Wang, W Zhu, W Xu, and T Zhang. "A nondestructive self-reference scheme for spin-transfer torque random access memory (STT-RAM)." In Proceedings Design, Automation and Test in Europe, Date, 148-153. 2010.
Y Chen, and H Li. "Patents relevant to cross-point memory array." Recent Patents on Electrical Engineeringe 3, no. 2 (2010): 114-124.

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