Publications
STT-RAM cache hierarchy with multiretention MTJ designs." Ieee Transactions on Very Large Scale Integration (Vlsi) Systems 22, no. 6 (2014): 1281-1293.
"Statistical Cache Bypassing for Non-Volatile Memory." Ieee Transactions on Computers 65, no. 11 (2016): 3427-3440.
"Stacking magnetic random access memory atop microprocessors: An architecture-level evaluation." Iet Computers & Digital Techniques 5, no. 3 (2011): 213-220.
"Spintronic memristor through spin-thorque-induced magnetization motion." Ieee Electron Device Letters 30, no. 3 (2009): 294-297.
"Spintronic memristor temperature sensor." Ieee Electron Device Letters 31, no. 1 (2010): 20-22.
"Spintronic memristor: Compact model and statistical analysis." Journal of Low Power Electronics 7, no. 2 (2011): 234-244.
"Spintronic Memristor as Interface between DNA and Solid State Devices." Ieee Journal on Emerging and Selected Topics in Circuits and Systems 6, no. 2 (2016): 212-221.
"SPINBIS: Spintronics-based Bayesian inference system with stochastic computing." Ieee Transactions on Computer Aided Design of Integrated Circuits and Systems 39, no. 4 (2020): 789-802.
"Spin transfer torque memory with thermal assist mechanism: A case study." Ieee Transactions on Magnetics 46, no. 3 PART 2 (2010): 860-865.
"Spin torque random access memory down to 22 nm technology." Ieee Transactions on Magnetics 44, no. 11 PART 2 (2008): 2479-2482.
"SpikeSen: Low-Latency In-Sensor-Intelligence Design With Neuromorphic Spiking Neurons." Ieee Transactions on Circuits and Systems Ii: Express Briefs 70, no. 6 (2023): 1876-1880.
"Space-Time-Efficient Modeling of Large-Scale 3-D Cross-Point Memory Arrays by Operation Adaption and Network Compaction." Ieee Transactions on Computer Aided Design of Integrated Circuits and Systems 41, no. 10 (2022): 3479-3491.
"Small-world Hopfield neural networks with weight salience priority and memristor synapses for digit recognition." Neural Computing and Applications 27, no. 4 (2016): 837-844.
"Sliding Mode Stabilization of Memristive Neural Networks With Leakage Delays and Control Disturbance." Ieee Transactions on Neural Networks and Learning Systems 32, no. 3 (2021): 1254-1263.
"Sliding mode control of neural networks via continuous or periodic sampling event-triggering algorithm." Neural Networks : the Official Journal of the International Neural Network Society 121 (2020): 140-147.
"A single-Vt low-leakage gated-ground cache for deep submicron." Ieee Journal of Solid State Circuits 38, no. 2 (2003): 319-328.
"Shift-Optimized Energy-Efficient Racetrack-Based Main Memory." Journal of Circuits, Systems and Computers 27, no. 05 (2018): 1850081.
"EMS-i
: An Efficient Memory System Design with Specialized Caching Mechanism for Recommendation Inference." Acm Transactions on Embedded Computing Systems 22, no. 5s (2023): 1-22.
"RRAM-Based Analog Approximate Computing." Ieee Transactions on Computer Aided Design of Integrated Circuits and Systems 34, no. 12 (2015): 1905-1917.
"Revisiting memristor properties." International Journal of Bifurcation and Chaos 30, no. 12 (2020).
"Resistive Memory‐Based In‐Memory Computing: From Device and Large‐Scale Integration System Perspectives." Advanced Intelligent Systems 1, no. 7 (2019): 1900068.
"Reshaping Future Computing Systems with Emerging Nonvolatile Memory Technologies." Ieee Micro 39, no. 1 (2019): 54-57.
"Research Progress on Memristor: From Synapses to Computing Systems." Ieee Transactions on Circuits and Systems I: Regular Papers 69, no. 5 (2022): 1845-1857.
"RED: A ReRAM-Based Efficient Accelerator for Deconvolutional Computation." Ieee Transactions on Computer Aided Design of Integrated Circuits and Systems 39, no. 12 (2020): 4736-4747.
"Reconfigurable Neuromorphic Computing System with Memristor-Based Synapse Design." Neural Processing Letters 41, no. 2 (2015): 159-167.
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