|Title||Spintronic memristor: Compact model and statistical analysis|
|Publication Type||Journal Article|
|Year of Publication||2011|
|Authors||M Hu, HH Li, Y Chen, and X Wang|
|Journal||Journal of Low Power Electronics|
|Pagination||234 - 244|
The fourth fundamental passive circuit element - memristor, has received the increased attentions after a real device was demonstrated by HP Lab in 2008. The distinctive characteristic of a memristor to record the historical profile of the voltage/current through itself creates great potentials in highly integrated circuit and system design. Among all the proposed memristor structures, magnetic-based spintronic memristor becomes a promising technology for its simple structure and the compatibility to the traditional CMOS process. In this paper, we depict a compact model of the spintronic memristor based on the magnetic-domain-wall motion mechanism. Our model takes into account the variations of material parameters and fabrication process, which significantly affect the actual electrical characteristics of a memristor in nano-scale technologies. Furthermore, we present the applications of the compact model, analyze the effect of process variations on memristor electrical properties, and discuss the corresponding circuit design considerations. Our proposed compact model can be easily implemented in Verilog-A language, compatible to SPICE-based simulation, and beneficial to minimize the design margin of memristor-based circuit implementations. Copyright © 2011 American Scientific Publishers All rights reserved.
|Short Title||Journal of Low Power Electronics|