Spin torque random access memory down to 22 nm technology

TitleSpin torque random access memory down to 22 nm technology
Publication TypeJournal Article
Year of Publication2008
AuthorsX Wang, Y Chen, H Li, D Dimitrov, and H Liu
JournalIeee Transactions on Magnetics
Volume44
Start Page2479
Issue11 PART 2
Pagination2479 - 2482
Date Published01/2008
Abstract

Spin torque random access memory (ST-MRAM) design spaces down to CMOS 22 nm technology node are explored using a dynamic magnetic tunneling junction (MTJ)-CMOS model. The coupled dynamics of MTJ and CMOS is modeled by a combination of MTJ micromagnetic simulation and CMOS SPICE circuit simulation. The paper analyzes trade-offs between MTJ current threshold, MTJ thermal stability and CMOS driving strength. The analysis provides information on physics requirements and technology bottlenecks for MTJ to achieve maximum capacity supported by CMOS 22 nm technology node. Magnetic solutions for MTJ to fully achieve CMOS 22 nm potential capacities are reviewed. © 2008 IEEE.

DOI10.1109/TMAG.2008.2002386
Short TitleIeee Transactions on Magnetics