Space-Time-Efficient Modeling of Large-Scale 3D Cross-Point Memory Arrays by Operation Adaption and Network Compaction

TitleSpace-Time-Efficient Modeling of Large-Scale 3D Cross-Point Memory Arrays by Operation Adaption and Network Compaction
Publication TypeJournal Article
Year of Publication2021
AuthorsC Wang, D Feng, W Tong, J Liu, B Wu, and Y Chen
JournalIeee Transactions on Computer Aided Design of Integrated Circuits and Systems
Date Published01/2021
Abstract

Three-dimensional (3D) integrated cross-point memory arrays can be used to build high-density storage-class memory systems. However, the coupled network topology caused by sharing word-lines or bit-lines between adjacent memory layers significantly enlarges the memory space overhead and time cost of memory operation simulations on mega-scale 3D cross-point memory arrays. We observe that different components of the 3D cross-point array have different contribution significance to the key metrics of write or read operations, and the distribution patterns of principal components in the arrays are different for write and read operations. We propose an operation-adaptive array modeling framework that exploits the impact of the applied operation on the distribution of array principal components for 3D cross-point memory arrays. Based on the modeling framework, we propose two array network compaction methods for efficient write and read operation simulations on 3D cross-point arrays respectively: pruning zero-biased unselected cells and group-merging neighboring half-selected cells with a specific granularity. Also, serially-connected line segments are merged, and floating segments are deleted. Evaluations show that the proposed methods significantly reduce the memory space overhead and time cost of memory operation simulations for various layer sizes and different cell-level access parallelism in an array. Besides, the proposed methods can efficiently simulate memory operations on multilayered 3D cross-point memory arrays with up to 4096×4096 layer size under the 16-GB memory space constraint, achieving a 64-times improvement in layer size that can be simulated compared with the conventional complete 3D cross-point array network model.

DOI10.1109/TCAD.2021.3123591
Short TitleIeee Transactions on Computer Aided Design of Integrated Circuits and Systems