|Title||Reduction of data prevention cost and improvement of reliability in MLC NAND flash storage system|
|Publication Type||Conference Paper|
|Year of Publication||2014|
|Authors||D Wang, J Guo, K Bu, and Y Chen|
|Conference Name||2014 International Conference on Computing, Networking and Communications, Icnc 2014|
In recent years, multi-level-cell (MLC) NAND flash technologies are prevailingly employed in both enterprise and consumer storage systems due to the advantages on power consumption and fabrication cost. However, short endurance and long write access time of NAND flash pose challenge for system designers. The incurred high bit error prevention cost and unreliable backup power for power failure protection are two acute issues in NAND flash based storage system (NFSS). This paper presents a collection of two contributions: DA-RAID-5 is proposed to reduce cost of data protection from bit error; low cost power failure protection is adopted to improve system robustness in terms of power failure. The experimental results show that, compared to the best prior work, DA-RAID-5 can reduce the NFSS response time by 9.7% on average. The low cost power failure protection scheme can substantially improve the backup power reliability with very marginal performance overheads. © 2014 IEEE.