|Title||A practical low-power memristor-based analog neural branch predictor|
|Publication Type||Conference Paper|
|Year of Publication||2013|
|Authors||J Wang, Y Tim, WF Wong, and HH Li|
|Conference Name||Proceedings of the International Symposium on Low Power Electronics and Design|
Recently, the discovery of memristor brought the promise of high density, low energy, and combined memory/arithmetic capability into computing. This paper demonstrates a practical neural branch predictor based on memristor. By using analog computation techniques, as well as exploiting the accuracy tolerance of branch prediction, our design is able to efficiently realize a neural prediction algorithm. Compared to the digital counterpart, our method achieves significant energy reduction while maintaining a better prediction accuracy and a higher IPC. Our approach also reduces the resource and energy required by an alternative design. © 2013 IEEE.