Optimizing MLC-based STT-RAM Caches by Dynamic Block Size Reconfiguration

TitleOptimizing MLC-based STT-RAM Caches by Dynamic Block Size Reconfiguration
Publication TypeConference Paper
Year of Publication2014
AuthorsJ Wang, P Roy, W-F Wong, X Bi, and HH Li
Conference NameProceedings Ieee International Conference on Computer Design: Vlsi in Computers and Processors
Date Published01/2014