|Title||GaaS-X: Graph Analytics Accelerator Supporting Sparse Data Representation using Crossbar Architectures|
|Publication Type||Conference Paper|
|Year of Publication||2020|
|Authors||N Challapalle, S Rampalli, L Song, N Chandramoorthy, K Swaminathan, J Sampson, Y Chen, and V Narayanan|
|Conference Name||Proceedings International Symposium on Computer Architecture|
Graph analytics applications are ubiquitous in this era of a connected world. These applications have very low compute to byte-transferred ratios and exhibit poor locality, which limits their computational efficiency on general purpose computing systems. Conventional hardware accelerators employ custom dataflow and memory hierarchy organization to overcome these challenges. Processing-in-memory (PIM) accelerators leverage massively parallel compute capable memory arrays to perform the in-situ operations on graph data or employ custom compute elements near the memory to leverage larger internal bandwidths. In this work, we present GaaS-X, a graph analytics accelerator that inherently supports the sparse graph data representations using an in-situ compute-enabled crossbar memory architectures. We alleviate the overheads of redundant writes, sparse to dense conversions, and redundant computations on the invalid edges that are present in the state of the art crossbar-based PIM accelerators. GaaS-X achieves 7.7 × and 2.4 × performance and 22 × and 5.7 ×, energy savings, respectively, over two state-of-the-art crossbar accelerators and offers orders of magnitude improvements over GPU and CPU solutions.