Extending the lifetime of object-based NAND flash device with STT-RAM/DRAM hybrid buffer

TitleExtending the lifetime of object-based NAND flash device with STT-RAM/DRAM hybrid buffer
Publication TypeConference Paper
Year of Publication2017
AuthorsC Min, J Guo, H Li, and Y Chen
Conference NameProceedings of the Asia and South Pacific Design Automation Conference, Asp Dac
Date Published02/2017
Abstract

A major limitation of NAND flash memory is erase-before-program characteristics. It incurs write amplification, severely degrading system performance and endurance. Previous works reveal that metadata update substantially contributes to write amplification in object-based NAND flash device (ONFD). To further reduce the overhead of metadata update in ONFD, we propose a hybrid buffer scheme (HBS) by utilizing the lower latency and byte-addressable characteristics of the promising emerging non-volatile memory STT-RAM. Our HBS proposes to store ONFD metadata with highest cost in a complement STT-RAM buffer to reduce write amplification. Considering limited size of STT-RAM, we propose a hybrid buffer management technique to maximize effective memory utilization. In addition, by leveraging non-volatility of STT-RAM, our HBS can also substantially reduce data recovery overhead and complexity upon power failure. Experiment results show that the proposed design can achieve up to 15% performance improvement with average 34% endurance extension compared to the state-of-the-art works.

DOI10.1109/ASPDAC.2017.7858416