Combined magnetic-and circuit-level enhancements for the nondestructive self-reference scheme of STT-RAM

TitleCombined magnetic-and circuit-level enhancements for the nondestructive self-reference scheme of STT-RAM
Publication TypeConference Paper
Year of Publication2010
AuthorsY Chen, H Li, X Wang, W Zhu, W Xu, and T Zhang
Conference NameProceedings of the International Symposium on Low Power Electronics and Design
Date Published10/2010
Abstract

A nondestructive self-reference read scheme (NSRS) was recently proposed to overcome the bit-to-bit variation in Spin-Transfer Torque Random Access Memory (STT-RAM). In this work, we introduced three magnetic-and circuit-level techniques, including 1) R-I curve skewing, 2) yield-driven sensing current selection, and 3) ratio matching to improve the sense margin and robustness of NSRS. The measurements of our 16Kb STT-RAM test chip show that compared to the original NSRS design, our proposed technologies successfully increased the sense margin by 2.5X with minimized impacts on the memory reliability and hardware cost. Copyright 2010 ACM.

DOI10.1145/1840845.1840847