|Title||Access scheme of multi-level cell spin-transfer torque random access memory and its optimization|
|Publication Type||Conference Paper|
|Year of Publication||2010|
|Authors||Y Chen, X Wang, W Zhu, H Li, Z Sun, G Sun, and Y Xie|
|Conference Name||2007 50th Midwest Symposium on Circuits and Systems|
In this work, we study the access (read and write) scheme of the newly proposed Multi-Level Cell Spin-Transfer Torque Random Access Memory (MLC STT-RAM) from both the circuit design and architectural perspectives. Based on the physical principles of the resistance state transition of MLC STT-RAM, we proposed a read circuitry based on Dichotomic search algorithm and three write schemes with various design complexities - simple, complex, and hybrid schemes. The circuit and architectural level evaluations were conducted to analyze the power and performance tradeoffs in each proposed write mechanisms of MLC STT-RAM. © 2010 IEEE.